[llvm] [RISCV] Add packw+packh isel pattern for unaligned loads on RV64. (PR #152095)

[Sam Elliott via llvm-commits]

================
@@ -661,6 +661,13 @@ def : Pat<(binop_allwusers<or> (shl GPR:$rs2, (i64 16)),
 def : Pat<(i64 (or (sext_inreg (shl GPR:$rs2, (i64 16)), i32),
                    (zexti16 (i64 GPR:$rs1)))),
           (PACKW GPR:$rs1, GPR:$rs2)>;
+
+// Match a packh for the high half with a zero extended value in the low half.
+// If the low half also happens to be a packh, it can be matched separately.
----------------
lenary wrote:

I think?

https://github.com/llvm/llvm-project/pull/152095