[llvm] [RISCV] Simplify one of the RV32 PACK isel patterns. (PR #152045)

Sam Elliott via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 4 19:09:17 PDT 2025

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lenary wrote:

You reference a missed case - can it be turned into a test? I got the impression it could be, but maybe that's wrong?

https://github.com/llvm/llvm-project/pull/152045

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