[llvm] 70af09e - Revert "[SLP] Fix a check for main/alternate interchanged instruction" (#151997)

[via llvm-commits]

Author: Michael Halkenhäuser
Date: 2025-08-04T12:57:20-04:00
New Revision: 70af09e3a19c7465a6b263385ffcbbaa3a1a51e4

URL: https://github.com/llvm/llvm-project/commit/70af09e3a19c7465a6b263385ffcbbaa3a1a51e4
DIFF: https://github.com/llvm/llvm-project/commit/70af09e3a19c7465a6b263385ffcbbaa3a1a51e4.diff

LOG: Revert "[SLP] Fix a check for main/alternate interchanged instruction" (#151997)

This reverts commit 3ee8d047109ea4bb479095f4b153c2120a8d726c.

Revert reason: FAILED build for openmp-offload-amdgpu-runtime-2 
https://lab.llvm.org/buildbot/#/builders/10/builds/10827

Added: 
    

Modified: 
    llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 
    llvm/test/Transforms/SLPVectorizer/X86/main-alternate-interechanged-detect.ll


################################################################################
diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 5a956fb733c27..0ca25bf891039 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -1238,12 +1238,6 @@ class InstructionsState {
     BinOpSameOpcodeHelper Converter(MainOp);
     if (!Converter.add(I) || !Converter.add(MainOp))
       return nullptr;
-    if (!Converter.hasCandidateOpcode(MainOp->getOpcode()) && isAltShuffle()) {
-      BinOpSameOpcodeHelper AltConverter(AltOp);
-      if (AltConverter.add(I) && AltConverter.add(AltOp) &&
-          AltConverter.hasCandidateOpcode(AltOp->getOpcode()))
-        return AltOp;
-    }
     if (Converter.hasAltOp() && !isAltShuffle())
       return nullptr;
     return Converter.hasAltOp() ? AltOp : MainOp;

diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/main-alternate-interechanged-detect.ll b/llvm/test/Transforms/SLPVectorizer/X86/main-alternate-interechanged-detect.ll
deleted file mode 100644
index 472c25c0cd1b2..0000000000000
--- a/llvm/test/Transforms/SLPVectorizer/X86/main-alternate-interechanged-detect.ll
+++ /dev/null
@@ -1,30 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
-; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
-
-define i64 @test() {
-; CHECK-LABEL: define i64 @test() {
-; CHECK-NEXT:  [[BB:.*]]:
-; CHECK-NEXT:    [[SHL:%.*]] = shl i32 0, 1
-; CHECK-NEXT:    [[ADD1:%.*]] = add i32 0, 1
-; CHECK-NEXT:    br label %[[BB2:.*]]
-; CHECK:       [[BB2]]:
-; CHECK-NEXT:    [[PHI:%.*]] = phi i32 [ [[SHL]], %[[BB]] ]
-; CHECK-NEXT:    [[PHI3:%.*]] = phi i32 [ 0, %[[BB]] ]
-; CHECK-NEXT:    [[PHI4:%.*]] = phi i32 [ 0, %[[BB]] ]
-; CHECK-NEXT:    [[PHI5:%.*]] = phi i32 [ [[ADD1]], %[[BB]] ]
-; CHECK-NEXT:    ret i64 0
-;
-bb:
-  %shl = shl i32 0, 1
-  %mul = mul i32 0, 0
-  %add = add i32 0, 0
-  %add1 = add i32 0, 1
-  br label %bb2
-
-bb2:
-  %phi = phi i32 [ %shl, %bb ]
-  %phi3 = phi i32 [ %add, %bb ]
-  %phi4 = phi i32 [ %mul, %bb ]
-  %phi5 = phi i32 [ %add1, %bb ]
-  ret i64 0
-}