[llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 4 09:38:55 PDT 2025


================
@@ -535,6 +535,71 @@ unsigned GCNSubtarget::getMaxNumVGPRs(const MachineFunction &MF) const {
   return getBaseMaxNumVGPRs(F, MFI.getWavesPerEU());
 }
 
+bool GCNSubtarget::isRealSchedDependency(MachineInstr *DefI, int DefOpIdx,
+                                         MachineInstr *UseI,
+                                         int UseOpIdx) const {
+  // From the (gfx942, for example) ISA:
+  // "Packed 32-bit instructions operate on 2 dwords at a time and those
+  // operands must be two-dword aligned (i.e. an even VGPR address). Output
+  // modifiers are not supported for these instructions. OPSEL and OPSEL_HI work
+  // to select the first or second DWORD for each source."
+  // -> We can save dependencies on VGPRs by analyzing the operand selection.
+  // See also
+  // https://llvm.org/docs/AMDGPUModifierSyntax.html#amdgpu-synid-op-sel
----------------
arsenm wrote:

No point in referring to syntax documentation? 

https://github.com/llvm/llvm-project/pull/140255


More information about the llvm-commits mailing list