[llvm] [RISCV] custom scmp(x, 0) and scmp(0, x) lowering for RVV (PR #151753)

[Luke Lau via llvm-commits]

================
@@ -8223,6 +8225,36 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
   case ISD::SADDSAT:
   case ISD::SSUBSAT:
     return lowerToScalableOp(Op, DAG);
+  case ISD::SCMP: {
+    SDLoc DL(Op);
+    EVT VT = Op->getValueType(0);
+    SDValue LHS = Op->getOperand(0);
+    SDValue RHS = Op->getOperand(1);
+    unsigned SEW = VT.getScalarSizeInBits();
+    EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
+
+    SDValue Shift = DAG.getConstant(SEW - 1, DL, VT);
+    SDValue Zero = DAG.getConstant(0, DL, VT);
+    SDValue One = DAG.getConstant(1, DL, VT);
+    SDValue MinusOne = DAG.getAllOnesConstant(DL, VT);
+
+    if (ISD::isConstantSplatVectorAllZeros(RHS.getNode())) {
+      // scmp(lhs, 0) -> vor.vv(vsra.vi/vx(lhs,SEW-1), vmin.vx(lhs,1))
+      LHS = DAG.getFreeze(LHS);
+      SDValue Sra = DAG.getNode(ISD::SRA, DL, VT, LHS, Shift);
+      SDValue Min = DAG.getNode(ISD::SMIN, DL, VT, LHS, One);
+      return DAG.getNode(ISD::OR, DL, VT, Sra, Min);
+    }
+    if (ISD::isConstantSplatVectorAllZeros(LHS.getNode())) {
+      // scmp(0, rhs) -> vmerge.vi(vmsgt.vi(rhs,0), vsrl.vi/vx(rhs,SEW-1), -1)
----------------
lukel97 wrote:

```suggestion
      // scmp(0, rhs) -> vmerge.vi(vmsle.vi(rhs,0), vsrl.vi/vx(rhs,SEW-1), -1)
```

https://github.com/llvm/llvm-project/pull/151753