[llvm] [RISCV] Create disjoint or in RISCVGatherScatterLowering (PR #151981)

[Min-Yih Hsu via llvm-commits]

mshockwave wrote:

> Don't we have IR tests for this pass that shouldn't be affected by this change?

(I guess you meant "that _should_ be affected by this change")
There is a test in `test/CodeGen/RISCV/rvv/strided-load-store.ll` for pattern matching disjoint OR, but not sure whether if we even have one to check whether we _generate_ a disjoint OR. @el-ev could you add a test if there isn't one?

https://github.com/llvm/llvm-project/pull/151981