[llvm] 3ee8d04 - [SLP] Fix a check for main/alternate interchanged instruction

[Alexey Bataev via llvm-commits]

Author: Alexey Bataev
Date: 2025-08-04T08:31:35-07:00
New Revision: 3ee8d047109ea4bb479095f4b153c2120a8d726c

URL: https://github.com/llvm/llvm-project/commit/3ee8d047109ea4bb479095f4b153c2120a8d726c
DIFF: https://github.com/llvm/llvm-project/commit/3ee8d047109ea4bb479095f4b153c2120a8d726c.diff

LOG: [SLP] Fix a check for main/alternate interchanged instruction

If the instruction is checked for matching the main instruction, need to
check if the opcode of the main instruction is compatible with the
operands of the instruction. If they are not, need to check the
alternate instruction and its operands for compatibility and return
alternate instruction as a match.

Fixes #151699

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/main-alternate-interechanged-detect.ll

Modified: 
    llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 0ca25bf891039..5a956fb733c27 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -1238,6 +1238,12 @@ class InstructionsState {
     BinOpSameOpcodeHelper Converter(MainOp);
     if (!Converter.add(I) || !Converter.add(MainOp))
       return nullptr;
+    if (!Converter.hasCandidateOpcode(MainOp->getOpcode()) && isAltShuffle()) {
+      BinOpSameOpcodeHelper AltConverter(AltOp);
+      if (AltConverter.add(I) && AltConverter.add(AltOp) &&
+          AltConverter.hasCandidateOpcode(AltOp->getOpcode()))
+        return AltOp;
+    }
     if (Converter.hasAltOp() && !isAltShuffle())
       return nullptr;
     return Converter.hasAltOp() ? AltOp : MainOp;

diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/main-alternate-interechanged-detect.ll b/llvm/test/Transforms/SLPVectorizer/X86/main-alternate-interechanged-detect.ll
new file mode 100644
index 0000000000000..472c25c0cd1b2
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/main-alternate-interechanged-detect.ll
@@ -0,0 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+
+define i64 @test() {
+; CHECK-LABEL: define i64 @test() {
+; CHECK-NEXT:  [[BB:.*]]:
+; CHECK-NEXT:    [[SHL:%.*]] = shl i32 0, 1
+; CHECK-NEXT:    [[ADD1:%.*]] = add i32 0, 1
+; CHECK-NEXT:    br label %[[BB2:.*]]
+; CHECK:       [[BB2]]:
+; CHECK-NEXT:    [[PHI:%.*]] = phi i32 [ [[SHL]], %[[BB]] ]
+; CHECK-NEXT:    [[PHI3:%.*]] = phi i32 [ 0, %[[BB]] ]
+; CHECK-NEXT:    [[PHI4:%.*]] = phi i32 [ 0, %[[BB]] ]
+; CHECK-NEXT:    [[PHI5:%.*]] = phi i32 [ [[ADD1]], %[[BB]] ]
+; CHECK-NEXT:    ret i64 0
+;
+bb:
+  %shl = shl i32 0, 1
+  %mul = mul i32 0, 0
+  %add = add i32 0, 0
+  %add1 = add i32 0, 1
+  br label %bb2
+
+bb2:
+  %phi = phi i32 [ %shl, %bb ]
+  %phi3 = phi i32 [ %add, %bb ]
+  %phi4 = phi i32 [ %mul, %bb ]
+  %phi5 = phi i32 [ %add1, %bb ]
+  ret i64 0
+}