[llvm] [AMDGPU] Use SDNodeXForm to select a few VOP3P modifiers, NFC (PR #151907)

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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp,h -- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
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<details>
<summary>
View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 212f48723..30d0e0d2d 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -7043,17 +7043,17 @@ void AMDGPUInstructionSelector::renderRoundMode(MachineInstrBuilder &MIB,
 }
 
 void AMDGPUInstructionSelector::renderVOP3PModsNeg(MachineInstrBuilder &MIB,
-                                                const MachineInstr &MI,
-                                                int OpIdx) const {
+                                                   const MachineInstr &MI,
+                                                   int OpIdx) const {
   unsigned Mods = SISrcMods::OP_SEL_1;
-   if (MI.getOperand(OpIdx).getImm())
-     Mods ^= SISrcMods::NEG;
+  if (MI.getOperand(OpIdx).getImm())
+    Mods ^= SISrcMods::NEG;
   MIB.addImm((int64_t)Mods);
 }
 
 void AMDGPUInstructionSelector::renderVOP3PModsNegs(MachineInstrBuilder &MIB,
-                                                const MachineInstr &MI,
-                                                int OpIdx) const {
+                                                    const MachineInstr &MI,
+                                                    int OpIdx) const {
   unsigned Mods = SISrcMods::OP_SEL_1;
   if (MI.getOperand(OpIdx).getImm())
     Mods ^= (SISrcMods::NEG | SISrcMods::NEG_HI);
@@ -7061,8 +7061,8 @@ void AMDGPUInstructionSelector::renderVOP3PModsNegs(MachineInstrBuilder &MIB,
 }
 
 void AMDGPUInstructionSelector::renderVOP3PModsNegAbs(MachineInstrBuilder &MIB,
-                                                const MachineInstr &MI,
-                                                int OpIdx) const {
+                                                      const MachineInstr &MI,
+                                                      int OpIdx) const {
   unsigned Val = MI.getOperand(OpIdx).getImm();
   unsigned Mods = SISrcMods::OP_SEL_1;
   if (Val == 1)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
index d0b5dc5e1..c9da41984 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
@@ -413,11 +413,11 @@ private:
                        int OpIdx) const;
 
   void renderVOP3PModsNeg(MachineInstrBuilder &MIB, const MachineInstr &MI,
-                           int OpIdx) const;
+                          int OpIdx) const;
   void renderVOP3PModsNegs(MachineInstrBuilder &MIB, const MachineInstr &MI,
-                            int OpIdx) const;
+                           int OpIdx) const;
   void renderVOP3PModsNegAbs(MachineInstrBuilder &MIB, const MachineInstr &MI,
-                            int OpIdx) const;
+                             int OpIdx) const;
 
   void renderPrefetchLoc(MachineInstrBuilder &MIB, const MachineInstr &MI,
                          int OpIdx) const;

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https://github.com/llvm/llvm-project/pull/151907