[llvm] AMDGPU: Handle multiple AGPR MFMA rewrites (PR #147975)

[Carl Ritson via llvm-commits]

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@@ -57,27 +57,36 @@ class AMDGPURewriteAGPRCopyMFMAImpl {
         TRI(*ST.getRegisterInfo()), MRI(MF.getRegInfo()), VRM(VRM), LRM(LRM),
         LIS(LIS) {}
 
+  bool isRewriteCandidate(const MachineInstr &MI) const {
+    return TII.isMAI(MI) && AMDGPU::getMFMASrcCVDstAGPROp(MI.getOpcode()) != -1;
+  }
+
   /// Compute the register class constraints based on the uses of \p Reg,
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perlfu wrote:

Comment needs updating as arguments to function have changed.

https://github.com/llvm/llvm-project/pull/147975