[llvm] [PredicateInfo] Support existing `PredicateType` by adding `PredicatePHI` when needing introduction of phi nodes (PR #151132)

[Rajveer Singh Bharadwaj via llvm-commits]

================
@@ -452,6 +459,71 @@ void PredicateInfoBuilder::processSwitch(
   }
 }
 
+void PredicateInfoBuilder::identifyPHICandidates(
+    SmallVectorImpl<Value *> &OpsToRename) {
+  for (Value *Op : OpsToRename) {
+    const auto &ValueInfo = getValueInfo(Op);
+    SmallPtrSet<BasicBlock *, 4> DefiningBlocks;
+    for (const auto *PInfo : ValueInfo.Infos) {
+      if (auto *PBranch = dyn_cast<PredicateBranch>(PInfo)) {
+        DefiningBlocks.insert(PBranch->To);
+      } else if (auto *PSwitch = dyn_cast<PredicateSwitch>(PInfo)) {
+        DefiningBlocks.insert(PSwitch->To);
+      }
+    }
+
+    if (DefiningBlocks.size() > 1) {
+      SmallPtrSet<BasicBlock *, 8> PHIBlocks(DefiningBlocks.begin(),
+                                             DefiningBlocks.end());
+      PHICandidates[*PHIBlocks.begin()].push_back(Op);
----------------
Rajveer100 wrote:

This part is what needs to be fixed, for now I just pushed to make sure the insertion functionality and other logics work well, which it does:

```llvm
PredicateInfo for function: h5diff
define noundef i32 @h5diff(i32 %0, i1 %1) local_unnamed_addr {
  %cond = icmp eq i32 %0, 0
  br i1 %1, label %3, label %4

3:                                                ; preds = %2
  store i32 1, ptr @p, align 4
; Has predicate info
; branch predicate info { TrueEdge: 1 Comparison:  %cond = icmp eq i32 %0, 0 Edge: [label %3,label %5], RenamedOp: %cond }
  %cond.0 = call i1 @llvm.ssa.copy.i1(i1 %cond)
; Has predicate info
; branch predicate info { TrueEdge: 1 Comparison:  %cond = icmp eq i32 %0, 0 Edge: [label %3,label %5], RenamedOp: %0 }
  %.0 = call i32 @llvm.ssa.copy.i32(i32 %0)
  br i1 %cond, label %5, label %common.ret

common.ret:                                       ; preds = %5, %4, %3
  ret i32 0

4:                                                ; preds = %2
  store i32 2, ptr @p, align 4
; Has predicate info
; branch predicate info { TrueEdge: 1 Comparison:  %cond = icmp eq i32 %0, 0 Edge: [label %4,label %5], RenamedOp: %cond }
  %cond.1 = call i1 @llvm.ssa.copy.i1(i1 %cond)
; Has predicate info
; branch predicate info { TrueEdge: 1 Comparison:  %cond = icmp eq i32 %0, 0 Edge: [label %4,label %5], RenamedOp: %0 }
  %.1 = call i32 @llvm.ssa.copy.i32(i32 %0)
  br i1 %cond, label %5, label %common.ret

5:                                                ; preds = %4, %3
  %.predicate.phi = phi i32 [ %.1, %4 ], [ %.0, %3 ]
  %cond.predicate.phi = phi i1 [ %cond.1, %4 ], [ %cond.0, %3 ]
; Has predicate info
; phi predicate info { PHIBlock: label %5 IncomingEdges: 2, RenamedOp: %0 }
  %6 = call i32 @llvm.ssa.copy.i32(i32 %0)
  store i32 %6, ptr @p, align 4
  br label %common.ret
}
```

https://github.com/llvm/llvm-project/pull/151132