[llvm] [AArch64] Add sve bf16 fpext and fpround costs. (PR #150485)
Paul Walker via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 1 07:20:50 PDT 2025
================
@@ -3100,6 +3106,12 @@ InstructionCost AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
{ISD::FP_ROUND, MVT::v2bf16, MVT::v2f64, 2}, // bfcvtn+fcvtn
{ISD::FP_ROUND, MVT::v4bf16, MVT::v4f64, 3}, // fcvtn+fcvtl2+bfcvtn
{ISD::FP_ROUND, MVT::v8bf16, MVT::v8f64, 6}, // 2 * fcvtn+fcvtn2+bfcvtn
+ {ISD::FP_ROUND, MVT::nxv2bf16, MVT::nxv2f32, 1}, // bfcvt
+ {ISD::FP_ROUND, MVT::nxv4bf16, MVT::nxv4f32, 1}, // bfcvt
+ {ISD::FP_ROUND, MVT::nxv8bf16, MVT::nxv8f32, 3}, // bfcvt+bfcvt+uzp1
+ {ISD::FP_ROUND, MVT::nxv2bf16, MVT::nxv2f64, 2}, // fcvtx+bfcvt
+ {ISD::FP_ROUND, MVT::nxv4bf16, MVT::nxv4f64, 5}, // fcvtx+bfcvt+bfcvt+uzp1
----------------
paulwalker-arm wrote:
```suggestion
{ISD::FP_ROUND, MVT::nxv4bf16, MVT::nxv4f64, 5}, // 2xfcvtx+2xbfcvt+uzp1
```
https://github.com/llvm/llvm-project/pull/150485
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