[llvm] [RISCV][TTI] Enable masked interleave access for scalable vector (PR #149981)

Mel Chen via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 1 00:52:12 PDT 2025

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Mel-Chen wrote:

Try to reland this. https://github.com/llvm/llvm-project/pull/151665

https://github.com/llvm/llvm-project/pull/149981

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Next message: [compiler-rt] Relax muldc3 test to avoid precision issue (PR #151663)
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