[llvm] [RISCV] Improvements to .note.gnu.property section. (PR #151436)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 31 22:35:26 PDT 2025
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/151436
>From 8e219f996a2589ee2ac8ddaeb9c44d7bdf374e29 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 30 Jul 2025 19:19:32 -0700
Subject: [PATCH 1/3] [RISCV] Move the emitValueToAlignment before the header
in emitNoteGnuPropertySection.
I assume the feature_1_and should appear immediately after the
header so we should align the header to avoid a gap.
---
llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp | 2 +-
llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
index 36558613d9172..6cb0d6843f965 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
@@ -83,6 +83,7 @@ void RISCVTargetStreamer::emitNoteGnuPropertySection(
OutStreamer.switchSection(NoteSection);
// Emit the note header
+ OutStreamer.emitValueToAlignment(NoteAlign);
OutStreamer.emitIntValue(4, 4); // n_namsz
MCSymbol *const NDescBeginSym = Ctx.createTempSymbol();
@@ -97,7 +98,6 @@ void RISCVTargetStreamer::emitNoteGnuPropertySection(
// Emit n_desc field
OutStreamer.emitLabel(NDescBeginSym);
- OutStreamer.emitValueToAlignment(NoteAlign);
// Emit the feature_1_and property
OutStreamer.emitIntValue(ELF::GNU_PROPERTY_RISCV_FEATURE_1_AND, 4); // pr_type
diff --git a/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll b/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
index 24d63cbebc7af..ee31c762c1be1 100644
--- a/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
+++ b/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
@@ -7,13 +7,13 @@
; ASM: .section ".note.GNU-stack","", at progbits
; ASM-NEXT: .section .note.gnu.property,"a", at note
+; ASM32-NEXT: .p2align 2, 0x0
+; ASM64-NEXT: .p2align 3, 0x0
; ASM-NEXT: .word 4
; ASM-NEXT: .word .Ltmp1-.Ltmp0
; ASM-NEXT: .word 5
; ASM-NEXT: .asciz "GNU"
; ASM-NEXT: .Ltmp0:
-; ASM32-NEXT: .p2align 2, 0x0
-; ASM64-NEXT: .p2align 3, 0x0
; ASM-NEXT: .word 3221225472
; ASM-NEXT: .word 4
; ASM-NEXT: .word 2
>From 42462073c82eff50bf7dd61f3b107780a855c555 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 30 Jul 2025 22:29:17 -0700
Subject: [PATCH 2/3] fixup! Address review comments and simplify code.
---
.../MCTargetDesc/RISCVTargetStreamer.cpp | 19 +++++++------------
.../RISCV/note-gnu-property-zicfiss.ll | 8 +++-----
2 files changed, 10 insertions(+), 17 deletions(-)
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
index 6cb0d6843f965..b5d1b6c385916 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
@@ -68,11 +68,14 @@ void RISCVTargetStreamer::emitNoteGnuPropertySection(
const Triple &Triple = Ctx.getTargetTriple();
Align NoteAlign;
+ uint64_t DescSize;
if (Triple.isArch64Bit()) {
NoteAlign = Align(8);
+ DescSize = 16;
} else {
assert(Triple.isArch32Bit());
NoteAlign = Align(4);
+ DescSize = 12;
}
assert(Ctx.getObjectFileType() == MCContext::Environment::IsELF);
@@ -84,28 +87,20 @@ void RISCVTargetStreamer::emitNoteGnuPropertySection(
// Emit the note header
OutStreamer.emitValueToAlignment(NoteAlign);
- OutStreamer.emitIntValue(4, 4); // n_namsz
-
- MCSymbol *const NDescBeginSym = Ctx.createTempSymbol();
- MCSymbol *const NDescEndSym = Ctx.createTempSymbol();
- const MCExpr *const NDescSzExpr =
- MCBinaryExpr::createSub(MCSymbolRefExpr::create(NDescEndSym, Ctx),
- MCSymbolRefExpr::create(NDescBeginSym, Ctx), Ctx);
-
- OutStreamer.emitValue(NDescSzExpr, 4); // n_descsz
+ OutStreamer.emitIntValue(4, 4); // n_namsz
+ OutStreamer.emitIntValue(DescSize, 4); // n_descsz
OutStreamer.emitIntValue(ELF::NT_GNU_PROPERTY_TYPE_0, 4); // n_type
OutStreamer.emitBytes(StringRef("GNU", 4)); // n_name
// Emit n_desc field
- OutStreamer.emitLabel(NDescBeginSym);
// Emit the feature_1_and property
OutStreamer.emitIntValue(ELF::GNU_PROPERTY_RISCV_FEATURE_1_AND, 4); // pr_type
OutStreamer.emitIntValue(4, 4); // pr_datasz
OutStreamer.emitIntValue(Feature1And, 4); // pr_data
- OutStreamer.emitValueToAlignment(NoteAlign); // pr_padding
+ if (Triple.isArch64Bit())
+ OutStreamer.emitIntValue(0, 4); // pr_padding
- OutStreamer.emitLabel(NDescEndSym);
OutStreamer.popSection();
}
diff --git a/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll b/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
index ee31c762c1be1..ea4a14e1eca4a 100644
--- a/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
+++ b/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
@@ -10,16 +10,14 @@
; ASM32-NEXT: .p2align 2, 0x0
; ASM64-NEXT: .p2align 3, 0x0
; ASM-NEXT: .word 4
-; ASM-NEXT: .word .Ltmp1-.Ltmp0
+; ASM32-NEXT: .word 12
+; ASM64-NEXT: .word 16
; ASM-NEXT: .word 5
; ASM-NEXT: .asciz "GNU"
-; ASM-NEXT: .Ltmp0:
; ASM-NEXT: .word 3221225472
; ASM-NEXT: .word 4
; ASM-NEXT: .word 2
-; ASM32-NEXT: .p2align 2, 0x0
-; ASM64-NEXT: .p2align 3, 0x0
-; ASM-NEXT: .Ltmp1:
+; ASM64-NEXT: .word 0
define i32 @f() "hw-shadow-stack" {
entry:
>From d749be88d355b27610b66e1a2e5934ef839f7816 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 31 Jul 2025 22:35:08 -0700
Subject: [PATCH 3/3] fixup! Remove section alignment. change padding back to
emitValueToAlignment.
---
llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp | 4 +---
llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll | 3 ++-
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
index b5d1b6c385916..f70837ea3433b 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
@@ -81,7 +81,6 @@ void RISCVTargetStreamer::emitNoteGnuPropertySection(
assert(Ctx.getObjectFileType() == MCContext::Environment::IsELF);
MCSection *const NoteSection =
Ctx.getELFSection(".note.gnu.property", ELF::SHT_NOTE, ELF::SHF_ALLOC);
- NoteSection->setAlignment(NoteAlign);
OutStreamer.pushSection();
OutStreamer.switchSection(NoteSection);
@@ -98,8 +97,7 @@ void RISCVTargetStreamer::emitNoteGnuPropertySection(
OutStreamer.emitIntValue(ELF::GNU_PROPERTY_RISCV_FEATURE_1_AND, 4); // pr_type
OutStreamer.emitIntValue(4, 4); // pr_datasz
OutStreamer.emitIntValue(Feature1And, 4); // pr_data
- if (Triple.isArch64Bit())
- OutStreamer.emitIntValue(0, 4); // pr_padding
+ OutStreamer.emitValueToAlignment(NoteAlign); // pr_padding
OutStreamer.popSection();
}
diff --git a/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll b/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
index ea4a14e1eca4a..efc4439a5ba17 100644
--- a/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
+++ b/llvm/test/CodeGen/RISCV/note-gnu-property-zicfiss.ll
@@ -17,7 +17,8 @@
; ASM-NEXT: .word 3221225472
; ASM-NEXT: .word 4
; ASM-NEXT: .word 2
-; ASM64-NEXT: .word 0
+; ASM32-NEXT: .p2align 2, 0x0
+; ASM64-NEXT: .p2align 3, 0x0
define i32 @f() "hw-shadow-stack" {
entry:
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