[llvm] [llvm] using wrapper llvm::sort(nfc) (PR #151000)

[via llvm-commits]

https://github.com/Zhenhang1213 updated https://github.com/llvm/llvm-project/pull/151000

>From 95e19a58ca5a68e36b7113ec6446db2d1c504e9a Mon Sep 17 00:00:00 2001
From: Austin <zhenhangwang at huawei.com>
Date: Tue, 29 Jul 2025 01:05:31 +0800
Subject: [PATCH] [llvm] using wrapper llvm::sort(nfc)

using wrapper llvm::sort(nfc)
---
 llvm/lib/Bitcode/Writer/BitcodeWriter.cpp           | 2 +-
 llvm/lib/CodeGen/MIRPrinter.cpp                     | 2 +-
 llvm/lib/IR/AsmWriter.cpp                           | 2 +-
 llvm/lib/Support/BalancedPartitioning.cpp           | 2 +-
 llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp | 2 +-
 llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp  | 2 +-
 llvm/lib/Transforms/Scalar/GVNSink.cpp              | 2 +-
 7 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
index e7ff772fc815a..3de289c6cfdeb 100644
--- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -609,7 +609,7 @@ class IndexBitcodeWriter : public BitcodeWriterBase {
       std::vector<StringRef> ModulePaths;
       for (auto &[ModPath, _] : Index.modulePaths())
         ModulePaths.push_back(ModPath);
-      llvm::sort(ModulePaths.begin(), ModulePaths.end());
+      llvm::sort(ModulePaths);
       for (auto &ModPath : ModulePaths)
         Callback(*Index.modulePaths().find(ModPath));
     }
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 7710b503facc3..aff21303f17fc 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -547,7 +547,7 @@ static void convertCallSiteObjects(yaml::MachineFunction &YMF,
   }
 
   // Sort call info by position of call instructions.
-  llvm::sort(YMF.CallSitesInfo.begin(), YMF.CallSitesInfo.end(),
+  llvm::sort(YMF.CallSitesInfo,
              [](yaml::CallSiteInfo A, yaml::CallSiteInfo B) {
                return std::tie(A.CallLocation.BlockNum, A.CallLocation.Offset) <
                       std::tie(B.CallLocation.BlockNum, B.CallLocation.Offset);
diff --git a/llvm/lib/IR/AsmWriter.cpp b/llvm/lib/IR/AsmWriter.cpp
index b21f4347f34d3..d1cd0c1c780d4 100644
--- a/llvm/lib/IR/AsmWriter.cpp
+++ b/llvm/lib/IR/AsmWriter.cpp
@@ -1160,7 +1160,7 @@ int SlotTracker::processIndex() {
   std::vector<StringRef> ModulePaths;
   for (auto &[ModPath, _] : TheIndex->modulePaths())
     ModulePaths.push_back(ModPath);
-  llvm::sort(ModulePaths.begin(), ModulePaths.end());
+  llvm::sort(ModulePaths);
   for (auto &ModPath : ModulePaths)
     CreateModulePathSlot(ModPath);
 
diff --git a/llvm/lib/Support/BalancedPartitioning.cpp b/llvm/lib/Support/BalancedPartitioning.cpp
index ed3b149c03daf..1914f4cc39d96 100644
--- a/llvm/lib/Support/BalancedPartitioning.cpp
+++ b/llvm/lib/Support/BalancedPartitioning.cpp
@@ -306,7 +306,7 @@ void BalancedPartitioning::split(const FunctionNodeRange Nodes,
   unsigned NumNodes = std::distance(Nodes.begin(), Nodes.end());
   auto NodesMid = Nodes.begin() + (NumNodes + 1) / 2;
 
-  llvm::sort(Nodes.begin(), Nodes.end(), [](auto &L, auto &R) {
+  llvm::sort(Nodes, [](auto &L, auto &R) {
     return L.InputOrderIndex < R.InputOrderIndex;
   });
 
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
index d443f4ea7d5c4..2d8f259007c66 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
@@ -236,7 +236,7 @@ cl::opt<LoweringKind> LoweringKindLoc(
                    "Lower via mixture of above strategies")));
 
 template <typename T> std::vector<T> sortByName(std::vector<T> &&V) {
-  llvm::sort(V.begin(), V.end(), [](const auto *L, const auto *R) {
+  llvm::sort(V, [](const auto *L, const auto *R) {
     return L->getName() < R->getName();
   });
   return {std::move(V)};
diff --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
index 52fa678a600e9..613048be52a2f 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
@@ -1987,7 +1987,7 @@ SmallVector<uint32_t, 8> HvxSelector::getPerfectCompletions(ShuffleMask SM,
   // times). In such cases it will be impossible to complete this to a
   // perfect shuffle.
   SmallVector<uint32_t, 8> Sorted(Worklist);
-  llvm::sort(Sorted.begin(), Sorted.end());
+  llvm::sort(Sorted);
 
   for (unsigned I = 0, E = Sorted.size(); I != E;) {
     unsigned P = Sorted[I], Count = 1;
diff --git a/llvm/lib/Transforms/Scalar/GVNSink.cpp b/llvm/lib/Transforms/Scalar/GVNSink.cpp
index 2058df33ea331..a532ce5ddcf9a 100644
--- a/llvm/lib/Transforms/Scalar/GVNSink.cpp
+++ b/llvm/lib/Transforms/Scalar/GVNSink.cpp
@@ -308,7 +308,7 @@ class InstructionUseExpr : public GVNExpression::BasicExpression {
 
     for (auto &U : I->uses())
       op_push_back(U.getUser());
-    llvm::sort(op_begin(), op_end());
+    llvm::sort(operands());
   }
 
   void setMemoryUseOrder(unsigned MUO) { MemoryUseOrder = MUO; }