[llvm] [AArch64] Improve lowering of scalar abs(sub(a, b)). (PR #151180)

[Ricardo Jesus via llvm-commits]

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@@ -25464,6 +25467,24 @@ static SDValue performCSELCombine(SDNode *N,
     }
   }
 
+  // CSEL a, b, cc, SUBS(SUB(x,y), 0) -> CSEL a, b, cc, SUBS(x,y) if cc doesn't
+  // use overflow flags to avoid the comparison with zero.
+  if (Cond.getOpcode() == AArch64ISD::SUBS &&
+      isNullConstant(Cond.getOperand(1))) {
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rj-jesus wrote:

Thanks for the suggestion, I've just updated the patch. The `CombineTo(Sub.getNode(), Subs)` means that we no longer need the previous change I had done in `performNegCSelCombine` to prevent the creation of SUB nodes with swapped operands, so I've reverted it.

I also added a `Cond->hasNUsesOfValue` check in the bit highlighted in this comment to ensure that we do not combine `Cond` to `Subs` in cases where the flags set by `Cond` have other uses. Since we do not check if those uses consume the results of the overflow flags, combining the nodes unconditionally may be invalid - although I'm not sure if this is a scenario we may hit in practice, since it seems redundant to check overflow flags from sub(x, 0)? In any case, I added new tests for this in `CodeGen/AArch64/csel-subs-dag-combine.ll`, although I'm not sure if there's a better way of doing so than matching the DAG combiner output directly.

https://github.com/llvm/llvm-project/pull/151180