[llvm] [AMDGPU][True16][GlobalISel] Fix v2*16 build_vector patterns (PR #151496)

[Mirko Brkušanin via llvm-commits]

================
@@ -3543,15 +3543,29 @@ def : GCNPat <
   (vecTy (UniformBinFrag<build_vector> (Ty undef), (Ty SReg_32:$src1))),
   (S_LSHL_B32 SReg_32:$src1, (i32 16))
 >;
-}
 
 def : GCNPat <
   (vecTy (DivergentBinFrag<build_vector> (Ty undef), (Ty VGPR_32:$src1))),
   (vecTy (V_LSHLREV_B32_e64 (i32 16), VGPR_32:$src1))
 >;
-} // End foreach Ty = ...
 }
 
+let True16Predicate = UseRealTrue16Insts in
+def : GCNPat <
+  (vecTy (DivergentBinFrag<build_vector> (Ty undef), (Ty VGPR_32:$src1))),
+  (REG_SEQUENCE VGPR_32, (Ty (IMPLICIT_DEF)), lo16, (Ty VGPR_32:$src1), hi16)
----------------
mbrkusanin wrote:

Right. This was one pattern that was used for both True16 and NonTrue16 so it had VGPR_32 and V_LSHLREV_B32_e64.

Now it's two. For True16 pattern, I changed V_LSHLREV_B32_e64 to REG_SEQUANCE but I should have also changed VGPR_32 to VGPR_16.

It is changed to VGPR_16 now.

https://github.com/llvm/llvm-project/pull/151496