[llvm] [RISCV][EVL] Disable EVLIndVarSimplify Pass by default (PR #151483)

[Shih-Po Hung via llvm-commits]

https://github.com/arcbbb updated https://github.com/llvm/llvm-project/pull/151483

>From d4068e4bff509205792e9abc563f8586053efbfa Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Thu, 31 Jul 2025 02:45:56 -0700
Subject: [PATCH] [RISCV][EVL] Disable the EVLIndVarSimplify Pass by default

---
 llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index da6ac2f6f31e9..26401aed139f0 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -114,6 +114,11 @@ static cl::opt<bool>
                            cl::desc("Enable Machine Pipeliner for RISC-V"),
                            cl::init(false), cl::Hidden);
 
+static cl::opt<bool>
+    EnableEVLIndVarSimplify("riscv-simplify-evl-iv",
+                            cl::desc("Enable the EVLIndVarSimplify pass."),
+                            cl::init(false), cl::Hidden);
+
 extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
   RegisterTargetMachine<RISCVTargetMachine> X(getTheRISCV32Target());
   RegisterTargetMachine<RISCVTargetMachine> Y(getTheRISCV64Target());
@@ -645,7 +650,7 @@ void RISCVTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
 
   PB.registerVectorizerEndEPCallback(
       [](FunctionPassManager &FPM, OptimizationLevel Level) {
-        if (Level.isOptimizingForSpeed())
+        if (Level.isOptimizingForSpeed() && EnableEVLIndVarSimplify)
           FPM.addPass(createFunctionToLoopPassAdaptor(EVLIndVarSimplifyPass()));
       });
 }