[llvm] [PowerPC] vector compare greater than support (PR #150422)

[via llvm-commits]

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@@ -4569,7 +4569,14 @@ bool PPCDAGToDAGISel::trySETCC(SDNode *N) {
   if (!IsStrict && LHS.getValueType().isVector()) {
     if (Subtarget->hasSPE())
       return false;
-
+    // Check if RHS or LHS vector operands are 0 and change SETNE to either
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Himadhith wrote:

Group code review comment - Change the comment to make it more descriptive of what the patch is meant to be doing. 

https://github.com/llvm/llvm-project/pull/150422