[llvm] 19f3aca - [RISCV] Remove unused vector pseudo class. NFC (#151327)

via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 30 19:14:39 PDT 2025


Author: Luke Lau
Date: 2025-07-31T10:14:36+08:00
New Revision: 19f3aca7efc2f71c5210c182ea8a3ca01e5c1a10

URL: https://github.com/llvm/llvm-project/commit/19f3aca7efc2f71c5210c182ea8a3ca01e5c1a10
DIFF: https://github.com/llvm/llvm-project/commit/19f3aca7efc2f71c5210c182ea8a3ca01e5c1a10.diff

LOG: [RISCV] Remove unused vector pseudo class. NFC (#151327)

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
index 6afc942d2ca5b..03e6f43a38945 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
@@ -1510,21 +1510,6 @@ class VPseudoTiedBinaryCarryIn<VReg RetClass,
   let VLMul = MInfo.value;
 }
 
-class VPseudoTernaryNoMask<VReg RetClass,
-                           RegisterClass Op1Class,
-                           DAGOperand Op2Class,
-                           string Constraint> :
-      RISCVVPseudo<(outs RetClass:$rd),
-                   (ins RetClass:$rs3, Op1Class:$rs1, Op2Class:$rs2,
-                        AVL:$vl, sew:$sew)> {
-  let mayLoad = 0;
-  let mayStore = 0;
-  let hasSideEffects = 0;
-  let Constraints = !interleave([Constraint, "$rd = $rs3"], ",");
-  let HasVLOp = 1;
-  let HasSEWOp = 1;
-}
-
 class VPseudoTernaryNoMaskWithPolicy<VReg RetClass,
                                      RegisterClass Op1Class,
                                      DAGOperand Op2Class,


        


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