[llvm] 3a4d506 - [LLVM][CodeGen][AArch64] Prevent invalid extract_elt within combineStoreValueFPToInt.

[Paul Walker via llvm-commits]

Author: Paul Walker
Date: 2025-07-30T17:54:15Z
New Revision: 3a4d506cb057488ab8dbaf234b7761edb1854be9

URL: https://github.com/llvm/llvm-project/commit/3a4d506cb057488ab8dbaf234b7761edb1854be9
DIFF: https://github.com/llvm/llvm-project/commit/3a4d506cb057488ab8dbaf234b7761edb1854be9.diff

LOG: [LLVM][CodeGen][AArch64] Prevent invalid extract_elt within combineStoreValueFPToInt.

This reverts a small part of https://github.com/llvm/llvm-project/pull/147707
that triggers an isel failure because we cannot extract an >i32 element
into an i64 result.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    llvm/test/CodeGen/AArch64/tbl-loops.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 4f9471ca4aa6a..4fef93cc5aec5 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -24174,13 +24174,6 @@ static SDValue combineStoreValueFPToInt(StoreSDNode *ST,
   SDValue VecFP = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecSrcVT, FPSrc);
   SDValue VecConv = DAG.getNode(Value.getOpcode(), DL, VecDstVT, VecFP);
 
-  if (ST->isTruncatingStore()) {
-    EVT NewVecDstVT = EVT::getVectorVT(
-        *DAG.getContext(), ST->getMemoryVT(),
-        VecDstVT.getFixedSizeInBits() / ST->getMemoryVT().getFixedSizeInBits());
-    VecConv = DAG.getNode(AArch64ISD::NVCAST, DL, NewVecDstVT, VecConv);
-  }
-
   SDValue Zero = DAG.getVectorIdxConstant(0, DL);
   SDValue Extracted =
       DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, VecConv, Zero);

diff  --git a/llvm/test/CodeGen/AArch64/tbl-loops.ll b/llvm/test/CodeGen/AArch64/tbl-loops.ll
index 223698ba225a8..5fc996ad921ff 100644
--- a/llvm/test/CodeGen/AArch64/tbl-loops.ll
+++ b/llvm/test/CodeGen/AArch64/tbl-loops.ll
@@ -64,7 +64,8 @@ define void @loop1(ptr noalias nocapture noundef writeonly %dst, ptr nocapture n
 ; CHECK-NEXT:    fcsel s2, s0, s3, mi
 ; CHECK-NEXT:    subs w10, w10, #1
 ; CHECK-NEXT:    fcvtzs s2, s2
-; CHECK-NEXT:    st1 { v2.b }[0], [x9], #1
+; CHECK-NEXT:    fmov w11, s2
+; CHECK-NEXT:    strb w11, [x9], #1
 ; CHECK-NEXT:    b.ne .LBB0_7
 ; CHECK-NEXT:  .LBB0_8: // %for.cond.cleanup
 ; CHECK-NEXT:    ret