[llvm] [NVPTX] Add sparse MMA intrinsics (PR #150950)
Durgadoss R via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 30 09:26:54 PDT 2025
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@@ -2001,6 +2183,48 @@ foreach layout_a = ["row", "col"] in {
} // layout_b
} // layout_a
+// MMA.SP
+class NVVM_MMA_SP<WMMA_REGS A, WMMA_REGS B, WMMA_REGS C, WMMA_REGS D>
+ : Intrinsic<D.regs,
+ !listconcat(A.regs, B.regs, C.regs, [llvm_i32_ty], [llvm_i32_ty])> {
+ int pos = !size(!listconcat(A.regs, B.regs, C.regs, [llvm_i32_ty]));
+
+ // The range [0;range) is for the sparsity selector that indicates the threads
+ // which contribute metadata.
+ int range = !if(!or(!and(!eq(A.geom, "m16n8k32"), !eq(A.ptx_elt_type, "bf16")),
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durga4github wrote:
nit: can we name it num_threads or something like that?
https://github.com/llvm/llvm-project/pull/150950
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