[llvm] 3696120 - [InstSimplify] Regenerate test checks (NFC)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2025-07-30T15:14:46+02:00
New Revision: 36961202fbf45968cc273fa78fe3479409f5a9c7

URL: https://github.com/llvm/llvm-project/commit/36961202fbf45968cc273fa78fe3479409f5a9c7
DIFF: https://github.com/llvm/llvm-project/commit/36961202fbf45968cc273fa78fe3479409f5a9c7.diff

LOG: [InstSimplify] Regenerate test checks (NFC)

Change the function name so that UTC works properly. Also move the
test into the InstCombine directory, as that's the pass that's
actually being tested.

Added: 
    llvm/test/Transforms/InstCombine/vectorgep-crash.ll

Modified: 
    

Removed: 
    llvm/test/Transforms/InstSimplify/ConstProp/vectorgep-crash.ll


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diff  --git a/llvm/test/Transforms/InstSimplify/ConstProp/vectorgep-crash.ll b/llvm/test/Transforms/InstCombine/vectorgep-crash.ll
similarity index 87%
rename from llvm/test/Transforms/InstSimplify/ConstProp/vectorgep-crash.ll
rename to llvm/test/Transforms/InstCombine/vectorgep-crash.ll
index 4aed1c5dd7d2a..3904c30a86718 100644
--- a/llvm/test/Transforms/InstSimplify/ConstProp/vectorgep-crash.ll
+++ b/llvm/test/Transforms/InstCombine/vectorgep-crash.ll
@@ -10,10 +10,14 @@ target triple = "x86_64-unknown-linux-gnu"
 %Partials = type { [2 x double] }
 %Partials.73 = type { [2 x %Dual.72] }
 
-; Function Attrs: sspreq
-define <8 x ptr> @"julia_axpy!_65480"(ptr %arg1, <8 x i64> %arg2) {
+define <8 x ptr> @test_vector_gep(ptr %arg1, <8 x i64> %arg2) {
+; CHECK-LABEL: define <8 x ptr> @test_vector_gep(
+; CHECK-SAME: ptr [[ARG1:%.*]], <8 x i64> [[ARG2:%.*]]) {
+; CHECK-NEXT:  [[TOP:.*:]]
+; CHECK-NEXT:    [[VECTORGEP14:%.*]] = getelementptr inbounds [[DUAL:%.*]], ptr [[ARG1]], <8 x i64> [[ARG2]], i32 1, i32 0, i64 0, i32 1, i32 0, i64 0
+; CHECK-NEXT:    ret <8 x ptr> [[VECTORGEP14]]
+;
 top:
-; CHECK: %VectorGep14 = getelementptr inbounds %Dual, ptr %arg1, <8 x i64> %arg2, i32 1, i32 0, i64 0, i32 1, i32 0, i64 0
   %VectorGep14 = getelementptr inbounds %Dual, ptr %arg1, <8 x i64> %arg2, i32 1, i32 0, i64 0, i32 1, i32 0, i64 0
   %0 = bitcast <8 x ptr> %VectorGep14 to <8 x ptr>
   ret <8 x ptr> %0