[llvm] [PowerPC] need to set CallFrameSize for the pass PPCReduceCRLogicals when insert a new block (PR #151017)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 29 19:45:31 PDT 2025


================
@@ -0,0 +1,124 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux  < %s | FileCheck %s -check-prefix=CHECK
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-gnu-linux  < %s | FileCheck %s -check-prefix=CHECKBE
+
+define ptr @xe_migrate_copy(i1 %tobool, i1 %tobool6) {
+; CHECK-LABEL: xe_migrate_copy:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    mfcr 12
+; CHECK-NEXT:    stw 12, 8(1)
+; CHECK-NEXT:    mflr 0
+; CHECK-NEXT:    stdu 1, -176(1)
+; CHECK-NEXT:    std 0, 192(1)
+; CHECK-NEXT:    .cfi_def_cfa_offset 176
+; CHECK-NEXT:    .cfi_offset lr, 16
+; CHECK-NEXT:    .cfi_offset r27, -40
+; CHECK-NEXT:    .cfi_offset r28, -32
+; CHECK-NEXT:    .cfi_offset r29, -24
+; CHECK-NEXT:    .cfi_offset r30, -16
+; CHECK-NEXT:    .cfi_offset cr2, 8
+; CHECK-NEXT:    std 27, 136(1) # 8-byte Folded Spill
+; CHECK-NEXT:    andi. 4, 4, 1
+; CHECK-NEXT:    crmove 8, 1
+; CHECK-NEXT:    andi. 3, 3, 1
+; CHECK-NEXT:    std 28, 144(1) # 8-byte Folded Spill
+; CHECK-NEXT:    crmove 9, 1
+; CHECK-NEXT:    std 29, 152(1) # 8-byte Folded Spill
+; CHECK-NEXT:    std 30, 160(1) # 8-byte Folded Spill
+; CHECK-NEXT:    lwz 30, 132(1)
+; CHECK-NEXT:    ld 28, 8(0)
+; CHECK-NEXT:    ld 29, 16(0)
+; CHECK-NEXT:    ld 27, 0(0)
+; CHECK-NEXT:    std 2, 40(1)
+; CHECK-NEXT:    b .LBB0_3
+; CHECK-NEXT:  .LBB0_1: # %if.then36
+; CHECK-NEXT:    #
+; CHECK-NEXT:    li 6, 1
+; CHECK-NEXT:  .LBB0_2: # %if.then36
+; CHECK-NEXT:    #
+; CHECK-NEXT:    mtctr 27
+; CHECK-NEXT:    li 4, 0
+; CHECK-NEXT:    li 5, 0
+; CHECK-NEXT:    li 7, 0
+; CHECK-NEXT:    li 8, 0
+; CHECK-NEXT:    mr 9, 30
+; CHECK-NEXT:    li 10, 0
+; CHECK-NEXT:    mr 2, 28
+; CHECK-NEXT:    mr 11, 29
+; CHECK-NEXT:    bctrl
+; CHECK-NEXT:    ld 2, 40(1)
+; CHECK-NEXT:  .LBB0_3: # %if.then36
+; CHECK-NEXT:    #
+; CHECK-NEXT:    lwz 3, 0(0)
+; CHECK-NEXT:    cmplwi 3, 0
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    crandc 20, 8, 2
+; CHECK-NEXT:    std 3, 112(1)
+; CHECK-NEXT:    bc 12, 20, .LBB0_1
+; CHECK-NEXT:  # %bb.4: # %if.then36
+; CHECK-NEXT:    #
+; CHECK-NEXT:    crand 20, 2, 9
+; CHECK-NEXT:    li 6, 0
+; CHECK-NEXT:    bc 4, 20, .LBB0_2
+; CHECK-NEXT:    b .LBB0_1
+;
+; CHECKBE-LABEL: xe_migrate_copy:
+; CHECKBE:       # %bb.0: # %entry
+; CHECKBE-NEXT:    mflr 0
+; CHECKBE-NEXT:    stwu 1, -64(1)
+; CHECKBE-NEXT:    stw 0, 68(1)
+; CHECKBE-NEXT:    .cfi_def_cfa_offset 64
+; CHECKBE-NEXT:    .cfi_offset lr, 4
+; CHECKBE-NEXT:    .cfi_offset r30, -8
+; CHECKBE-NEXT:    .cfi_offset cr2, -12
+; CHECKBE-NEXT:    mfcr 12
+; CHECKBE-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; CHECKBE-NEXT:    andi. 4, 4, 1
+; CHECKBE-NEXT:    stw 12, 52(1)
+; CHECKBE-NEXT:    crmove 8, 1
+; CHECKBE-NEXT:    lwz 30, 44(1)
+; CHECKBE-NEXT:    andi. 3, 3, 1
+; CHECKBE-NEXT:    crmove 9, 1
+; CHECKBE-NEXT:    b .LBB0_3
+; CHECKBE-NEXT:  .LBB0_1: # %if.then36
+; CHECKBE-NEXT:    #
+; CHECKBE-NEXT:    li 7, 1
+; CHECKBE-NEXT:  .LBB0_2: # %if.then36
+; CHECKBE-NEXT:    #
+; CHECKBE-NEXT:    li 4, 0
+; CHECKBE-NEXT:    li 5, 0
+; CHECKBE-NEXT:    li 6, 0
+; CHECKBE-NEXT:    li 9, 0
+; CHECKBE-NEXT:    li 10, 0
+; CHECKBE-NEXT:    bla 0x0
+; CHECKBE-NEXT:  .LBB0_3: # %if.then36
+; CHECKBE-NEXT:    #
+; CHECKBE-NEXT:    lwz 3, 0(0)
+; CHECKBE-NEXT:    stw 30, 12(1)
+; CHECKBE-NEXT:    cmplwi 3, 0
+; CHECKBE-NEXT:    crandc 20, 8, 2
+; CHECKBE-NEXT:    li 3, 0
+; CHECKBE-NEXT:    stw 3, 24(1)
+; CHECKBE-NEXT:    stw 3, 20(1)
+; CHECKBE-NEXT:    stw 3, 16(1)
+; CHECKBE-NEXT:    stw 3, 8(1)
+; CHECKBE-NEXT:    bc 12, 20, .LBB0_1
+; CHECKBE-NEXT:  # %bb.4: # %if.then36
+; CHECKBE-NEXT:    #
+; CHECKBE-NEXT:    crand 20, 2, 9
+; CHECKBE-NEXT:    li 7, 0
+; CHECKBE-NEXT:    bc 4, 20, .LBB0_2
+; CHECKBE-NEXT:    b .LBB0_1
+entry:
+  %src_L0 = alloca i64, align 8
+  br label %if.then36
+
+if.then36:                                        ; preds = %if.then36, %entry
+  %0 = load i32, ptr null, align 4
----------------
arsenm wrote:

Avoid the UB null load 

https://github.com/llvm/llvm-project/pull/151017


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