[llvm] [PowerPC] Implement vector uncompress instructions (PR #150702)

[zhijian lin via llvm-commits]

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@@ -45,6 +45,20 @@ multiclass XOForm_RTAB5_L1r<bits<6> opcode, bits<9> xo, dag OOL, dag IOL,
   }
 }
 
+class VXForm_VRTAB5<bits<11> xo, dag OOL, dag IOL, string asmstr,
+                    list<dag> pattern> : I<4, OOL, IOL, asmstr, NoItinerary> {
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diggerlin wrote:

I am curious that there is no opCode in the new define instruction ?

https://github.com/llvm/llvm-project/pull/150702