[llvm] [RISCV] Cost bf16/f16 vector non-unit memory accesses as legal without zvfhmin/zvfbfmin (PR #150882)

[Min-Yih Hsu via llvm-commits]

mshockwave wrote:

Since `TTI::isLegalMaskedLoad` no longer returns false in the absent of zvfhmin/zvfbfmin extensions, ScalarizeMaskedMemIntrinPass now stops processing masked.load/store with f16/bf16, results in crashing the backend (that doesn't enable zvfhmin/zvfbfmin) since it doesn't know how to scalarize them.

https://github.com/llvm/llvm-project/pull/150882