[llvm] [X86][GlobalISel] Improve carry value selection (PR #146586)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 29 01:25:03 PDT 2025
github-actions[bot] wrote:
<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
:warning: C/C++ code formatter, clang-format found issues in your code. :warning:
<details>
<summary>
You can test this locally with the following command:
</summary>
``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
``````````
</details>
<details>
<summary>
View the diff from clang-format here.
</summary>
``````````diff
diff --git a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
index 0def5ff4f..c3bf3fc75 100644
--- a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
+++ b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
@@ -1250,8 +1250,8 @@ bool X86InstructionSelector::selectUAddSub(MachineInstr &I,
.addReg(Op0Reg)
.addReg(Op1Reg);
- BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::SETCCr),
- CarryOutReg).addImm(X86::COND_B);
+ BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::SETCCr), CarryOutReg)
+ .addImm(X86::COND_B);
if (!constrainSelectedInstRegOperands(Inst, TII, TRI, RBI) ||
!RBI.constrainGenericRegister(CarryOutReg, *CarryRC, MRI))
``````````
</details>
https://github.com/llvm/llvm-project/pull/146586
More information about the llvm-commits
mailing list