[llvm] AMDGPU: Move asm constraint physreg parsing to utils (PR #150903)

[Fabian Ritter via llvm-commits]

================
@@ -1541,6 +1541,42 @@ bool shouldEmitConstantsToTextSection(const Triple &TT) {
   return TT.getArch() == Triple::r600;
 }
 
+static bool isValidRegPrefix(char C) {
+  return C == 'v' || C == 's' || C == 'a';
+}
+
+std::tuple<char, unsigned, unsigned>
+parseAsmConstraintPhysReg(StringRef Constraint) {
+  StringRef RegName = Constraint;
+  if (!RegName.consume_front("{") || !RegName.consume_back("}"))
+    return {};
+
+  char Kind = RegName.front();
+  if (!isValidRegPrefix(Kind))
+    return {};
+
+  RegName = RegName.drop_front();
+  if (RegName.consume_front("[")) {
+    unsigned Idx, End;
+    bool Failed = RegName.consumeInteger(10, Idx);
+    Failed |= !RegName.consume_front(":");
+    Failed |= RegName.consumeInteger(10, End);
+    Failed |= !RegName.consume_back("]");
+    if (!Failed) {
+      unsigned NumRegs = End - Idx + 1;
+      if (NumRegs > 1)
----------------
ritter-x2a wrote:

The `Idx > End` cases probably aren't a problem because either `NumRegs` or `Idx` would then be too big so that no matching register is found. But the multiplication can overflow, as this test currently compiles without an error for me:
```
define void @foo() {
  tail call void asm sideeffect "; use %0", "{v[2:2147483651]}"(i64 123)
  ret void
}
```
(with `2147483651 == ((1u << 31) | 3)`, so that `(Width = NumRegs * 32) == 64` because the multiplication overflows.)

https://github.com/llvm/llvm-project/pull/150903