[llvm] [GlobalISel] Adding G_AND identity combine (PR #150831)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-globalisel

@llvm/pr-subscribers-backend-aarch64

Author: Dávid Ferenc Szabó (dfszabo)

<details>
<summary>Changes</summary>

Combine G_AND(X, -1) to X.

---
Full diff: https://github.com/llvm/llvm-project/pull/150831.diff


2 Files Affected:

- (modified) llvm/include/llvm/Target/GlobalISel/Combine.td (+8-1) 
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir (+20) 


``````````diff
diff --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td
index fc81ab76dc72d..236402dfc0f1b 100644
--- a/llvm/include/llvm/Target/GlobalISel/Combine.td
+++ b/llvm/include/llvm/Target/GlobalISel/Combine.td
@@ -566,6 +566,12 @@ def right_identity_one_int: GICombineRule<
   (apply (GIReplaceReg $dst, $x))
 >;
 
+def right_identity_neg_one_int: GICombineRule<
+  (defs root:$dst),
+  (match (G_AND $dst, $x, -1)),
+  (apply (GIReplaceReg $dst, $x))
+>;
+
 def right_identity_one_fp: GICombineRule<
   (defs root:$dst),
   (match (G_FMUL $dst, $x, $y):$root,
@@ -2003,7 +2009,8 @@ def identity_combines : GICombineGroup<[select_same_val, right_identity_zero,
                                         trunc_lshr_buildvector_fold,
                                         bitcast_bitcast_fold, fptrunc_fpext_fold,
                                         right_identity_neg_zero_fp,
-                                        right_identity_neg_one_fp]>;
+                                        right_identity_neg_one_fp,
+                                        right_identity_neg_one_int]>;
 
 def const_combines : GICombineGroup<[constant_fold_fp_ops, const_ptradd_to_i2p,
                                      overlapping_and, mulo_by_2, mulo_by_0,
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
index d36b382672e60..1e9f1e905db7c 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
@@ -165,6 +165,26 @@ body:             |
 
 ...
 
+---
+name:            right_ident_and
+tracksRegLiveness: true
+body:             |
+  bb.1.entry:
+    liveins: $w0
+    ; Fold (x & -1) -> x
+    ; CHECK-LABEL: name: right_ident_and
+    ; CHECK: liveins: $w0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %x:_(s32) = COPY $w0
+    ; CHECK-NEXT: $w0 = COPY %x(s32)
+    ; CHECK-NEXT: RET_ReallyLR implicit $w0
+    %x:_(s32) = COPY $w0
+    %cst:_(s32) = G_CONSTANT i32 -1
+    %op:_(s32) = G_AND %x(s32), %cst
+    $w0 = COPY %op(s32)
+    RET_ReallyLR implicit $w0
+
+...
 ---
 name:            right_ident_or
 tracksRegLiveness: true

``````````

</details>


https://github.com/llvm/llvm-project/pull/150831