[llvm] [NVPTX] Enhance `mul.wide` and `mad.wide` peepholes (PR #150477)

Alex MacLean via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 25 19:47:37 PDT 2025


================
@@ -5408,6 +5408,53 @@ static SDValue PerformREMCombine(SDNode *N,
   return SDValue();
 }
 
+// (any_extend|sign_extend|zero_extend (mul|shl) x, y) -> (mul.wide x, y)
+static SDValue
+PerformExtendMULWIDECombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
+  unsigned ExtOpcode = N->getOpcode();
+  assert(ExtOpcode == ISD::ANY_EXTEND || ExtOpcode == ISD::SIGN_EXTEND ||
+         ExtOpcode == ISD::ZERO_EXTEND);
+  EVT ToVT = N->getValueType(0);
+  if (!(ToVT == MVT::i32 || ToVT == MVT::i64))
+    return SDValue();
+  SDValue Op = N->getOperand(0);
+  if (!(Op.getOpcode() == ISD::MUL || Op.getOpcode() == ISD::SHL))
+    return SDValue();
+  if (Op.getOpcode() == ISD::SHL && !isa<ConstantSDNode>(Op.getOperand(1)))
+    return SDValue();
+  EVT FromVT = Op.getValueType();
+  if (!(FromVT == MVT::i16 || FromVT == MVT::i32))
+    return SDValue();
+  if (ExtOpcode == ISD::SIGN_EXTEND && !Op->getFlags().hasNoSignedWrap())
+    return SDValue();
+  if (ExtOpcode == ISD::ZERO_EXTEND && !Op->getFlags().hasNoUnsignedWrap())
+    return SDValue();
+  if (ExtOpcode == ISD::ANY_EXTEND && !Op->getFlags().hasNoSignedWrap() &&
+      !Op->getFlags().hasNoUnsignedWrap())
----------------
AlexMaclean wrote:

Since the high bits are undef I don't actually think you need any wrap flags for this case. In any case,  as I say below we shouldn't include this case unless we find a test case where it would matter.

https://github.com/llvm/llvm-project/pull/150477


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