[llvm] [WebAssembly] Add support for relaxed nmadd (PR #150684)
Jasmine Tang via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 25 12:17:23 PDT 2025
https://github.com/badumbatish created https://github.com/llvm/llvm-project/pull/150684
Following footstep of https://github.com/llvm/llvm-project/pull/147487 (support for madd), this PR adds support for nmadd
>From 858b22e8ec2f5ecb5ad8a351617b974955b6fa42 Mon Sep 17 00:00:00 2001
From: Jasmine Tang <jjasmine at igalia.com>
Date: Fri, 25 Jul 2025 12:10:11 -0700
Subject: [PATCH 1/2] [WebAssembly] Precommit test for negative multiply add
support
---
.../CodeGen/WebAssembly/simd-relaxed-fnma.ll | 150 ++++++++++++++++++
1 file changed, 150 insertions(+)
create mode 100644 llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll
diff --git a/llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll b/llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll
new file mode 100644
index 0000000000000..3051d4576ab36
--- /dev/null
+++ b/llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll
@@ -0,0 +1,150 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+fp16,+simd128,+relaxed-simd | FileCheck %s --check-prefix=RELAXED
+; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+fp16,+simd128, | FileCheck %s --check-prefix=STRICT
+
+target triple = "wasm32"
+
+define double @fsub_fmul_contract_f64(double %a, double %b, double %c) {
+; RELAXED-LABEL: fsub_fmul_contract_f64:
+; RELAXED: .functype fsub_fmul_contract_f64 (f64, f64, f64) -> (f64)
+; RELAXED-NEXT: # %bb.0:
+; RELAXED-NEXT: f64.mul $push0=, $1, $0
+; RELAXED-NEXT: f64.sub $push1=, $2, $pop0
+; RELAXED-NEXT: return $pop1
+;
+; STRICT-LABEL: fsub_fmul_contract_f64:
+; STRICT: .functype fsub_fmul_contract_f64 (f64, f64, f64) -> (f64)
+; STRICT-NEXT: # %bb.0:
+; STRICT-NEXT: f64.mul $push0=, $1, $0
+; STRICT-NEXT: f64.sub $push1=, $2, $pop0
+; STRICT-NEXT: return $pop1
+ %mul = fmul contract double %b, %a
+ %sub = fsub contract double %c, %mul
+ ret double %sub
+}
+
+define <4 x float> @fsub_fmul_contract_4xf32(<4 x float> %a, <4 x float> %b, <4 x float> %c) {
+; RELAXED-LABEL: fsub_fmul_contract_4xf32:
+; RELAXED: .functype fsub_fmul_contract_4xf32 (v128, v128, v128) -> (v128)
+; RELAXED-NEXT: # %bb.0:
+; RELAXED-NEXT: f32x4.mul $push0=, $1, $0
+; RELAXED-NEXT: f32x4.sub $push1=, $2, $pop0
+; RELAXED-NEXT: return $pop1
+;
+; STRICT-LABEL: fsub_fmul_contract_4xf32:
+; STRICT: .functype fsub_fmul_contract_4xf32 (v128, v128, v128) -> (v128)
+; STRICT-NEXT: # %bb.0:
+; STRICT-NEXT: f32x4.mul $push0=, $1, $0
+; STRICT-NEXT: f32x4.sub $push1=, $2, $pop0
+; STRICT-NEXT: return $pop1
+ %mul = fmul contract <4 x float> %b, %a
+ %sub = fsub contract <4 x float> %c, %mul
+ ret <4 x float> %sub
+}
+
+
+define <8 x half> @fsub_fmul_contract_8xf16(<8 x half> %a, <8 x half> %b, <8 x half> %c) {
+; RELAXED-LABEL: fsub_fmul_contract_8xf16:
+; RELAXED: .functype fsub_fmul_contract_8xf16 (v128, v128, v128) -> (v128)
+; RELAXED-NEXT: # %bb.0:
+; RELAXED-NEXT: f16x8.mul $push0=, $1, $0
+; RELAXED-NEXT: f16x8.sub $push1=, $2, $pop0
+; RELAXED-NEXT: return $pop1
+;
+; STRICT-LABEL: fsub_fmul_contract_8xf16:
+; STRICT: .functype fsub_fmul_contract_8xf16 (v128, v128, v128) -> (v128)
+; STRICT-NEXT: # %bb.0:
+; STRICT-NEXT: f16x8.mul $push0=, $1, $0
+; STRICT-NEXT: f16x8.sub $push1=, $2, $pop0
+; STRICT-NEXT: return $pop1
+ %mul = fmul contract <8 x half> %b, %a
+ %sub = fsub contract <8 x half> %c, %mul
+ ret <8 x half> %sub
+}
+
+
+define <4 x float> @fsub_fmul_4xf32(<4 x float> %a, <4 x float> %b, <4 x float> %c) {
+; RELAXED-LABEL: fsub_fmul_4xf32:
+; RELAXED: .functype fsub_fmul_4xf32 (v128, v128, v128) -> (v128)
+; RELAXED-NEXT: # %bb.0:
+; RELAXED-NEXT: f32x4.mul $push0=, $1, $0
+; RELAXED-NEXT: f32x4.sub $push1=, $2, $pop0
+; RELAXED-NEXT: return $pop1
+;
+; STRICT-LABEL: fsub_fmul_4xf32:
+; STRICT: .functype fsub_fmul_4xf32 (v128, v128, v128) -> (v128)
+; STRICT-NEXT: # %bb.0:
+; STRICT-NEXT: f32x4.mul $push0=, $1, $0
+; STRICT-NEXT: f32x4.sub $push1=, $2, $pop0
+; STRICT-NEXT: return $pop1
+ %mul = fmul <4 x float> %b, %a
+ %sub = fsub contract <4 x float> %c, %mul
+ ret <4 x float> %sub
+}
+
+define <8 x float> @fsub_fmul_contract_8xf32(<8 x float> %a, <8 x float> %b, <8 x float> %c) {
+; RELAXED-LABEL: fsub_fmul_contract_8xf32:
+; RELAXED: .functype fsub_fmul_contract_8xf32 (i32, v128, v128, v128, v128, v128, v128) -> ()
+; RELAXED-NEXT: # %bb.0:
+; RELAXED-NEXT: f32x4.mul $push0=, $4, $2
+; RELAXED-NEXT: f32x4.sub $push1=, $6, $pop0
+; RELAXED-NEXT: v128.store 16($0), $pop1
+; RELAXED-NEXT: f32x4.mul $push2=, $3, $1
+; RELAXED-NEXT: f32x4.sub $push3=, $5, $pop2
+; RELAXED-NEXT: v128.store 0($0), $pop3
+; RELAXED-NEXT: return
+;
+; STRICT-LABEL: fsub_fmul_contract_8xf32:
+; STRICT: .functype fsub_fmul_contract_8xf32 (i32, v128, v128, v128, v128, v128, v128) -> ()
+; STRICT-NEXT: # %bb.0:
+; STRICT-NEXT: f32x4.mul $push0=, $4, $2
+; STRICT-NEXT: f32x4.sub $push1=, $6, $pop0
+; STRICT-NEXT: v128.store 16($0), $pop1
+; STRICT-NEXT: f32x4.mul $push2=, $3, $1
+; STRICT-NEXT: f32x4.sub $push3=, $5, $pop2
+; STRICT-NEXT: v128.store 0($0), $pop3
+; STRICT-NEXT: return
+ %mul = fmul contract <8 x float> %b, %a
+ %sub = fsub contract <8 x float> %c, %mul
+ ret <8 x float> %sub
+}
+
+
+define <2 x double> @fsub_fmul_contract_2xf64(<2 x double> %a, <2 x double> %b, <2 x double> %c) {
+; RELAXED-LABEL: fsub_fmul_contract_2xf64:
+; RELAXED: .functype fsub_fmul_contract_2xf64 (v128, v128, v128) -> (v128)
+; RELAXED-NEXT: # %bb.0:
+; RELAXED-NEXT: f64x2.mul $push0=, $1, $0
+; RELAXED-NEXT: f64x2.sub $push1=, $2, $pop0
+; RELAXED-NEXT: return $pop1
+;
+; STRICT-LABEL: fsub_fmul_contract_2xf64:
+; STRICT: .functype fsub_fmul_contract_2xf64 (v128, v128, v128) -> (v128)
+; STRICT-NEXT: # %bb.0:
+; STRICT-NEXT: f64x2.mul $push0=, $1, $0
+; STRICT-NEXT: f64x2.sub $push1=, $2, $pop0
+; STRICT-NEXT: return $pop1
+ %mul = fmul contract <2 x double> %b, %a
+ %sub = fsub contract <2 x double> %c, %mul
+ ret <2 x double> %sub
+}
+
+define float @fsub_fmul_contract_f32(float %a, float %b, float %c) {
+; RELAXED-LABEL: fsub_fmul_contract_f32:
+; RELAXED: .functype fsub_fmul_contract_f32 (f32, f32, f32) -> (f32)
+; RELAXED-NEXT: # %bb.0:
+; RELAXED-NEXT: f32.mul $push0=, $1, $0
+; RELAXED-NEXT: f32.sub $push1=, $2, $pop0
+; RELAXED-NEXT: return $pop1
+;
+; STRICT-LABEL: fsub_fmul_contract_f32:
+; STRICT: .functype fsub_fmul_contract_f32 (f32, f32, f32) -> (f32)
+; STRICT-NEXT: # %bb.0:
+; STRICT-NEXT: f32.mul $push0=, $1, $0
+; STRICT-NEXT: f32.sub $push1=, $2, $pop0
+; STRICT-NEXT: return $pop1
+ %mul = fmul contract float %b, %a
+ %sub = fsub contract float %c, %mul
+ ret float %sub
+}
+
>From dd1179616bbf91fe3a8e3c1ca2f67e99f709605a Mon Sep 17 00:00:00 2001
From: Jasmine Tang <jjasmine at igalia.com>
Date: Fri, 25 Jul 2025 12:11:14 -0700
Subject: [PATCH 2/2] Added support for negative multiply add
---
.../include/llvm/Target/TargetSelectionDAG.td | 3 +++
.../WebAssembly/WebAssemblyInstrSIMD.td | 2 ++
.../CodeGen/WebAssembly/simd-relaxed-fnma.ll | 25 ++++++++-----------
3 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/llvm/include/llvm/Target/TargetSelectionDAG.td b/llvm/include/llvm/Target/TargetSelectionDAG.td
index 8ec8697f26741..a4ed62bb5715c 100644
--- a/llvm/include/llvm/Target/TargetSelectionDAG.td
+++ b/llvm/include/llvm/Target/TargetSelectionDAG.td
@@ -1147,6 +1147,9 @@ def fadd_contract : PatFrag<(ops node:$a, node:$b), (fadd node:$a, node:$b),[{
return N->getFlags().hasAllowContract();
}]>;
+def fsub_contract : PatFrag<(ops node:$a, node:$b), (fsub node:$a, node:$b),[{
+ return N->getFlags().hasAllowContract();
+}]>;
def not : PatFrag<(ops node:$in), (xor node:$in, -1)>;
def vnot : PatFrag<(ops node:$in), (xor node:$in, immAllOnesV)>;
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index d13862f127736..143298b700928 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -1540,6 +1540,8 @@ multiclass SIMDMADD<Vec vec, bits<32> simdopA, bits<32> simdopS, list<Predicate>
def : Pat<(fadd_contract (vec.vt V128:$a), (fmul_contract (vec.vt V128:$b), (vec.vt V128:$c))),
(!cast<Instruction>("MADD_"#vec) V128:$a, V128:$b, V128:$c)>, Requires<[HasRelaxedSIMD]>;
+ def : Pat<(fsub_contract (vec.vt V128:$a), (fmul_contract (vec.vt V128:$b), (vec.vt V128:$c))),
+ (!cast<Instruction>("NMADD_"#vec) V128:$a, V128:$b, V128:$c)>, Requires<[HasRelaxedSIMD]>;
}
defm "" : SIMDMADD<F32x4, 0x105, 0x106, [HasRelaxedSIMD]>;
diff --git a/llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll b/llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll
index 3051d4576ab36..6e2d860c3f152 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll
@@ -27,9 +27,8 @@ define <4 x float> @fsub_fmul_contract_4xf32(<4 x float> %a, <4 x float> %b, <4
; RELAXED-LABEL: fsub_fmul_contract_4xf32:
; RELAXED: .functype fsub_fmul_contract_4xf32 (v128, v128, v128) -> (v128)
; RELAXED-NEXT: # %bb.0:
-; RELAXED-NEXT: f32x4.mul $push0=, $1, $0
-; RELAXED-NEXT: f32x4.sub $push1=, $2, $pop0
-; RELAXED-NEXT: return $pop1
+; RELAXED-NEXT: f32x4.relaxed_nmadd $push0=, $2, $1, $0
+; RELAXED-NEXT: return $pop0
;
; STRICT-LABEL: fsub_fmul_contract_4xf32:
; STRICT: .functype fsub_fmul_contract_4xf32 (v128, v128, v128) -> (v128)
@@ -47,9 +46,8 @@ define <8 x half> @fsub_fmul_contract_8xf16(<8 x half> %a, <8 x half> %b, <8 x h
; RELAXED-LABEL: fsub_fmul_contract_8xf16:
; RELAXED: .functype fsub_fmul_contract_8xf16 (v128, v128, v128) -> (v128)
; RELAXED-NEXT: # %bb.0:
-; RELAXED-NEXT: f16x8.mul $push0=, $1, $0
-; RELAXED-NEXT: f16x8.sub $push1=, $2, $pop0
-; RELAXED-NEXT: return $pop1
+; RELAXED-NEXT: f16x8.relaxed_nmadd $push0=, $2, $1, $0
+; RELAXED-NEXT: return $pop0
;
; STRICT-LABEL: fsub_fmul_contract_8xf16:
; STRICT: .functype fsub_fmul_contract_8xf16 (v128, v128, v128) -> (v128)
@@ -86,12 +84,10 @@ define <8 x float> @fsub_fmul_contract_8xf32(<8 x float> %a, <8 x float> %b, <8
; RELAXED-LABEL: fsub_fmul_contract_8xf32:
; RELAXED: .functype fsub_fmul_contract_8xf32 (i32, v128, v128, v128, v128, v128, v128) -> ()
; RELAXED-NEXT: # %bb.0:
-; RELAXED-NEXT: f32x4.mul $push0=, $4, $2
-; RELAXED-NEXT: f32x4.sub $push1=, $6, $pop0
-; RELAXED-NEXT: v128.store 16($0), $pop1
-; RELAXED-NEXT: f32x4.mul $push2=, $3, $1
-; RELAXED-NEXT: f32x4.sub $push3=, $5, $pop2
-; RELAXED-NEXT: v128.store 0($0), $pop3
+; RELAXED-NEXT: f32x4.relaxed_nmadd $push0=, $6, $4, $2
+; RELAXED-NEXT: v128.store 16($0), $pop0
+; RELAXED-NEXT: f32x4.relaxed_nmadd $push1=, $5, $3, $1
+; RELAXED-NEXT: v128.store 0($0), $pop1
; RELAXED-NEXT: return
;
; STRICT-LABEL: fsub_fmul_contract_8xf32:
@@ -114,9 +110,8 @@ define <2 x double> @fsub_fmul_contract_2xf64(<2 x double> %a, <2 x double> %b,
; RELAXED-LABEL: fsub_fmul_contract_2xf64:
; RELAXED: .functype fsub_fmul_contract_2xf64 (v128, v128, v128) -> (v128)
; RELAXED-NEXT: # %bb.0:
-; RELAXED-NEXT: f64x2.mul $push0=, $1, $0
-; RELAXED-NEXT: f64x2.sub $push1=, $2, $pop0
-; RELAXED-NEXT: return $pop1
+; RELAXED-NEXT: f64x2.relaxed_nmadd $push0=, $2, $1, $0
+; RELAXED-NEXT: return $pop0
;
; STRICT-LABEL: fsub_fmul_contract_2xf64:
; STRICT: .functype fsub_fmul_contract_2xf64 (v128, v128, v128) -> (v128)
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