[llvm] [AMDGPU] Support AMDGPUClamp for bf16 on gfx1250 (PR #150663)

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github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
``````````

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<details>
<summary>
View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index cce2c7c48..da2d62503 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -2510,18 +2510,18 @@ bool SIInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
     break;
   }
 
-  case AMDGPU::V_MAX_BF16_PSEUDO_e64:
-    assert(ST.hasBF16PackedInsts());
-    MI.setDesc(get(AMDGPU::V_PK_MAX_NUM_BF16));
-    MI.addOperand(MachineOperand::CreateImm(0)); // op_sel
-    MI.addOperand(MachineOperand::CreateImm(0)); // neg_lo
-    MI.addOperand(MachineOperand::CreateImm(0)); // neg_hi
-    auto Op0 = getNamedOperand(MI, AMDGPU::OpName::src0_modifiers);
-    Op0->setImm(Op0->getImm() | SISrcMods::OP_SEL_1);
-    auto Op1 = getNamedOperand(MI, AMDGPU::OpName::src1_modifiers);
-    Op1->setImm(Op1->getImm() | SISrcMods::OP_SEL_1);
-    break;
-  }
+case AMDGPU::V_MAX_BF16_PSEUDO_e64:
+  assert(ST.hasBF16PackedInsts());
+  MI.setDesc(get(AMDGPU::V_PK_MAX_NUM_BF16));
+  MI.addOperand(MachineOperand::CreateImm(0)); // op_sel
+  MI.addOperand(MachineOperand::CreateImm(0)); // neg_lo
+  MI.addOperand(MachineOperand::CreateImm(0)); // neg_hi
+  auto Op0 = getNamedOperand(MI, AMDGPU::OpName::src0_modifiers);
+  Op0->setImm(Op0->getImm() | SISrcMods::OP_SEL_1);
+  auto Op1 = getNamedOperand(MI, AMDGPU::OpName::src1_modifiers);
+  Op1->setImm(Op1->getImm() | SISrcMods::OP_SEL_1);
+  break;
+}
 
   return true;
 }

``````````

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https://github.com/llvm/llvm-project/pull/150663