[llvm] [DemandedBits] Add div/rem support (PR #148853)

[Nikita Popov via llvm-commits]

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@@ -246,6 +246,20 @@ void DemandedBits::determineLiveOperandBits(
     else
       AB &= ~(Known.One & ~Known2.One);
     break;
+  case Instruction::SRem: {
+    // urem and udiv will be converted to and/lshr
+    // multiple times and early on. So, we don't
+    // need to calculate demanded-bits for those.
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nikic wrote:

This comment looks oddly narrow.

https://github.com/llvm/llvm-project/pull/148853