[llvm] [RISCV] add load/store misched/PostRA subtarget features (PR #149409)

[Pengcheng Wang via llvm-commits]

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@@ -150,6 +150,14 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
 
   bool enablePostRAScheduler() const override { return UsePostRAScheduler; }
 
+  bool enableMISchedLoadClustering() const { return MISchedLoadClustering; }
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wangpc-pp wrote:

I think we don't need these because there are auto-generated methods.

https://github.com/llvm/llvm-project/pull/149409