[llvm] bd91e8a - [TableGen] Strengthen check for what operands can be an immediate in CompressInstEmitter. (#150568)

[via llvm-commits]

Author: Craig Topper
Date: 2025-07-24T21:54:51-07:00
New Revision: bd91e8a5bd115be1350d4ad3a7100303511b1d15

URL: https://github.com/llvm/llvm-project/commit/bd91e8a5bd115be1350d4ad3a7100303511b1d15
DIFF: https://github.com/llvm/llvm-project/commit/bd91e8a5bd115be1350d4ad3a7100303511b1d15.diff

LOG: [TableGen] Strengthen check for what operands can be an immediate in CompressInstEmitter. (#150568)

Registers can be represented by RegisterOperand, not just RegisterClass.
Instead of trying to block certain classes, only allow Operand.

Added: 
    

Modified: 
    llvm/utils/TableGen/CompressInstEmitter.cpp

Removed: 
    


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diff  --git a/llvm/utils/TableGen/CompressInstEmitter.cpp b/llvm/utils/TableGen/CompressInstEmitter.cpp
index 72e45ed5cca77..e80adce647423 100644
--- a/llvm/utils/TableGen/CompressInstEmitter.cpp
+++ b/llvm/utils/TableGen/CompressInstEmitter.cpp
@@ -275,7 +275,7 @@ void CompressInstEmitter::addDagOperandMapping(const Record *Rec,
         OperandMap[OpNo].Kind = OpData::Operand;
       } else if (const auto *II = dyn_cast<IntInit>(Dag->getArg(DAGOpNo))) {
         // Validate that corresponding instruction operand expects an immediate.
-        if (OpndRec->isSubClassOf("RegisterClass"))
+        if (!OpndRec->isSubClassOf("Operand"))
           PrintFatalError(Rec->getLoc(), "Error in Dag '" + Dag->getAsString() +
                                              "' Found immediate: '" +
                                              II->getAsString() +