[llvm] 4bee7e0 - [RISCV][IA] Rework VL for strided LD/ST optimization [nfc] (#150525)

via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 24 21:12:32 PDT 2025


Author: Philip Reames
Date: 2025-07-24T21:12:28-07:00
New Revision: 4bee7e09dfabf326ead941067a9ce9975f768918

URL: https://github.com/llvm/llvm-project/commit/4bee7e09dfabf326ead941067a9ce9975f768918
DIFF: https://github.com/llvm/llvm-project/commit/4bee7e09dfabf326ead941067a9ce9975f768918.diff

LOG: [RISCV][IA] Rework VL for strided LD/ST optimization [nfc] (#150525)

I'd originally written this creating a new VL, but realized it was
probably cleaner to be explicit about the truncation which is happening.
As these VLs are all constants (since these two codepaths see fixed
vectors) this should result in identical constants being created.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp b/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
index 0565fcd9c6bcf..30d8f850763a2 100644
--- a/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
@@ -224,10 +224,10 @@ bool RISCVTargetLowering::lowerInterleavedLoad(
     Value *Stride = ConstantInt::get(XLenTy, Factor * ScalarSizeInBytes);
     Value *Offset = ConstantInt::get(XLenTy, Indices[0] * ScalarSizeInBytes);
     Value *BasePtr = Builder.CreatePtrAdd(Ptr, Offset);
-    // Note: Same VL as above, but i32 not xlen due to signature of
-    // vp.strided.load
-    VL = Builder.CreateElementCount(Builder.getInt32Ty(),
-                                    VTy->getElementCount());
+    // For rv64, need to truncate i64 to i32 to match signature.  As VL is at most
+    // the number of active lanes (which is bounded by i32) this is safe.
+    VL = Builder.CreateTrunc(VL, Builder.getInt32Ty());
+
     CallInst *CI =
         Builder.CreateIntrinsic(Intrinsic::experimental_vp_strided_load,
                                 {VTy, BasePtr->getType(), Stride->getType()},
@@ -302,10 +302,9 @@ bool RISCVTargetLowering::lowerInterleavedStore(Instruction *Store,
     Value *Stride = ConstantInt::get(XLenTy, Factor * ScalarSizeInBytes);
     Value *Offset = ConstantInt::get(XLenTy, Index * ScalarSizeInBytes);
     Value *BasePtr = Builder.CreatePtrAdd(Ptr, Offset);
-    // Note: Same VL as above, but i32 not xlen due to signature of
-    // vp.strided.store
-    VL = Builder.CreateElementCount(Builder.getInt32Ty(),
-                                    VTy->getElementCount());
+    // For rv64, need to truncate i64 to i32 to match signature.  As VL is at
+    // most the number of active lanes (which is bounded by i32) this is safe.
+    VL = Builder.CreateTrunc(VL, Builder.getInt32Ty());
 
     CallInst *CI =
         Builder.CreateIntrinsic(Intrinsic::experimental_vp_strided_store,


        


More information about the llvm-commits mailing list