[llvm] [LLVM][NVPTX] Upstream tanh intrinsic for libdevice (PR #149596)

[Alex MacLean via llvm-commits]

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@@ -952,10 +952,13 @@ NVPTXTargetLowering::NVPTXTargetLowering(const NVPTXTargetMachine &TM,
   // promoted to f32. v2f16 is expanded to f16, which is then promoted
   // to f32.
   for (const auto &Op :
-       {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS}) {
+       {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, ISD::FTANH}) {
     setOperationAction(Op, MVT::f16, Promote);
     setOperationAction(Op, MVT::f32, Legal);
-    setOperationAction(Op, MVT::f64, Legal);
+    // only div/rem/sqrt are legal for f64
+    if (Op == ISD::FDIV || Op == ISD::FREM || Op == ISD::FSQRT) {
+      setOperationAction(Op, MVT::f64, Legal);
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AlexMaclean wrote:

I see, I was more wondering if there is a unit test that covers this change. My guess is that the compiler will now just crash in a slightly different way as a result of this change, but I suppose it's better to have a more accurate operation action table regardless. 

https://github.com/llvm/llvm-project/pull/149596