[llvm] [AMDGPU][True16][CodeGen] 16bit inline constant check for COPY (PR #150317)

via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 24 12:27:03 PDT 2025


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Brox Chen (broxigarchen)

<details>
<summary>Changes</summary>

Update the util function to check if the inline constant is overflow for 16bit COPY.

---
Full diff: https://github.com/llvm/llvm-project/pull/150317.diff


1 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.h (+4-3) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 800ea9ab50b85..053c1967f0265 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -1151,10 +1151,11 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
 
     if (isCopyInstr(MI)) {
       unsigned Size = getOpSize(MI, OpIdx);
-      assert(Size == 8 || Size == 4);
+      assert(Size == 8 || Size == 4 || Size == 2);
 
-      uint8_t OpType = (Size == 8) ?
-        AMDGPU::OPERAND_REG_IMM_INT64 : AMDGPU::OPERAND_REG_IMM_INT32;
+      uint8_t OpType = (Size == 8)   ? AMDGPU::OPERAND_REG_IMM_INT64
+                       : (Size == 4) ? AMDGPU::OPERAND_REG_IMM_INT32
+                                     : AMDGPU::OPERAND_REG_IMM_INT16;
       return isInlineConstant(ImmVal, OpType);
     }
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/150317


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