[llvm] vgpr inline constant (PR #150317)
Brox Chen via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 24 09:20:40 PDT 2025
https://github.com/broxigarchen updated https://github.com/llvm/llvm-project/pull/150317
>From ddda268d4d89b835023c18825a4f241173d2e071 Mon Sep 17 00:00:00 2001
From: guochen2 <guochen2 at amd.com>
Date: Wed, 23 Jul 2025 16:41:19 -0400
Subject: [PATCH] vgpr inline constant
---
llvm/lib/Target/AMDGPU/SIInstrInfo.h | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 800ea9ab50b85..053c1967f0265 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -1151,10 +1151,11 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
if (isCopyInstr(MI)) {
unsigned Size = getOpSize(MI, OpIdx);
- assert(Size == 8 || Size == 4);
+ assert(Size == 8 || Size == 4 || Size == 2);
- uint8_t OpType = (Size == 8) ?
- AMDGPU::OPERAND_REG_IMM_INT64 : AMDGPU::OPERAND_REG_IMM_INT32;
+ uint8_t OpType = (Size == 8) ? AMDGPU::OPERAND_REG_IMM_INT64
+ : (Size == 4) ? AMDGPU::OPERAND_REG_IMM_INT32
+ : AMDGPU::OPERAND_REG_IMM_INT16;
return isInlineConstant(ImmVal, OpType);
}
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