[llvm] [X86] Fix misassemble due to not storing registers to state machine on RParen (PR #150252)
Phoebe Wang via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 23 20:03:12 PDT 2025
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@@ -1054,9 +1054,27 @@ class X86AsmParser : public MCTargetAsmParser {
case IES_RBRAC:
case IES_RPAREN:
State = IES_RPAREN;
+ // In the case of a multiply, onRegister has already set IndexReg
+ // directly, with appropriate scale
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phoebewang wrote:
Add period.
https://github.com/llvm/llvm-project/pull/150252
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