[llvm] [ARM] Complete SubsumesPredicate (PR #150261)
via llvm-commits
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Wed Jul 23 09:57:21 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-arm
Author: AZero13 (AZero13)
<details>
<summary>Changes</summary>
Many missing cases were added.
---
Full diff: https://github.com/llvm/llvm-project/pull/150261.diff
2 Files Affected:
- (modified) llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp (+7-3)
- (modified) llvm/test/CodeGen/ARM/arm-shrink-wrapping-linux.ll (+112-114)
``````````diff
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 50217c3a047df..7044e36d6717f 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -474,13 +474,17 @@ bool ARMBaseInstrInfo::SubsumesPredicate(ArrayRef<MachineOperand> Pred1,
case ARMCC::AL:
return true;
case ARMCC::HS:
- return CC2 == ARMCC::HI;
+ return CC2 == ARMCC::HI || CC2 == ARMCC::EQ;
case ARMCC::LS:
return CC2 == ARMCC::LO || CC2 == ARMCC::EQ;
case ARMCC::GE:
- return CC2 == ARMCC::GT;
+ return CC2 == ARMCC::GT || CC2 == ARMCC::EQ;
case ARMCC::LE:
- return CC2 == ARMCC::LT;
+ return CC2 == ARMCC::LT || CC2 == ARMCC::EQ;
+ case ARMCC::PL:
+ return CC2 == ARMCC::EQ;
+ case ARMCC::NE:
+ return CC2 == ARMCC::HI || CC2 == ARMCC::LO || CC2 == ARMCC::GT || CC2 == ARMCC::LT || CC2 == ARMCC::MI;
}
}
diff --git a/llvm/test/CodeGen/ARM/arm-shrink-wrapping-linux.ll b/llvm/test/CodeGen/ARM/arm-shrink-wrapping-linux.ll
index b92f03d43bb4c..12b1be2a1f1a4 100644
--- a/llvm/test/CodeGen/ARM/arm-shrink-wrapping-linux.ll
+++ b/llvm/test/CodeGen/ARM/arm-shrink-wrapping-linux.ll
@@ -20,180 +20,178 @@ define fastcc ptr @wrongUseOfPostDominate(ptr readonly %s, i32 %off, ptr readnon
; ENABLE-NEXT: .save {r11, lr}
; ENABLE-NEXT: push {r11, lr}
; ENABLE-NEXT: cmn r1, #1
-; ENABLE-NEXT: ble .LBB0_7
+; ENABLE-NEXT: ble .LBB0_3
; ENABLE-NEXT: @ %bb.1: @ %while.cond.preheader
; ENABLE-NEXT: cmp r1, #0
-; ENABLE-NEXT: beq .LBB0_6
-; ENABLE-NEXT: @ %bb.2: @ %while.cond.preheader
-; ENABLE-NEXT: cmp r0, r2
-; ENABLE-NEXT: pophs {r11, pc}
-; ENABLE-NEXT: .LBB0_3: @ %while.body.preheader
-; ENABLE-NEXT: movw r12, :lower16:skip
-; ENABLE-NEXT: sub r1, r1, #1
-; ENABLE-NEXT: movt r12, :upper16:skip
-; ENABLE-NEXT: .LBB0_4: @ %while.body
-; ENABLE-NEXT: @ =>This Inner Loop Header: Depth=1
-; ENABLE-NEXT: ldrb r3, [r0]
-; ENABLE-NEXT: ldrb r3, [r12, r3]
-; ENABLE-NEXT: add r0, r0, r3
-; ENABLE-NEXT: sub r3, r1, #1
-; ENABLE-NEXT: cmp r3, r1
-; ENABLE-NEXT: bhs .LBB0_6
-; ENABLE-NEXT: @ %bb.5: @ %while.body
-; ENABLE-NEXT: @ in Loop: Header=BB0_4 Depth=1
-; ENABLE-NEXT: mov r1, r3
-; ENABLE-NEXT: cmp r0, r2
-; ENABLE-NEXT: blo .LBB0_4
-; ENABLE-NEXT: .LBB0_6: @ %if.end29
+; ENABLE-NEXT: cmpne r0, r2
+; ENABLE-NEXT: blo .LBB0_15
+; ENABLE-NEXT: .LBB0_2: @ %if.end29
; ENABLE-NEXT: pop {r11, pc}
-; ENABLE-NEXT: .LBB0_7: @ %while.cond2.outer
+; ENABLE-NEXT: .LBB0_3: @ %while.cond2.outer
; ENABLE-NEXT: @ =>This Loop Header: Depth=1
-; ENABLE-NEXT: @ Child Loop BB0_8 Depth 2
-; ENABLE-NEXT: @ Child Loop BB0_15 Depth 2
+; ENABLE-NEXT: @ Child Loop BB0_4 Depth 2
+; ENABLE-NEXT: @ Child Loop BB0_11 Depth 2
; ENABLE-NEXT: mov r3, r0
-; ENABLE-NEXT: .LBB0_8: @ %while.cond2
-; ENABLE-NEXT: @ Parent Loop BB0_7 Depth=1
+; ENABLE-NEXT: .LBB0_4: @ %while.cond2
+; ENABLE-NEXT: @ Parent Loop BB0_3 Depth=1
; ENABLE-NEXT: @ => This Inner Loop Header: Depth=2
; ENABLE-NEXT: add r1, r1, #1
; ENABLE-NEXT: cmp r1, #1
-; ENABLE-NEXT: beq .LBB0_18
-; ENABLE-NEXT: @ %bb.9: @ %while.body4
-; ENABLE-NEXT: @ in Loop: Header=BB0_8 Depth=2
+; ENABLE-NEXT: beq .LBB0_14
+; ENABLE-NEXT: @ %bb.5: @ %while.body4
+; ENABLE-NEXT: @ in Loop: Header=BB0_4 Depth=2
; ENABLE-NEXT: cmp r3, r2
-; ENABLE-NEXT: bls .LBB0_8
-; ENABLE-NEXT: @ %bb.10: @ %if.then7
-; ENABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1
+; ENABLE-NEXT: bls .LBB0_4
+; ENABLE-NEXT: @ %bb.6: @ %if.then7
+; ENABLE-NEXT: @ in Loop: Header=BB0_3 Depth=1
; ENABLE-NEXT: mov r0, r3
; ENABLE-NEXT: ldrb r12, [r0, #-1]!
; ENABLE-NEXT: sxtb lr, r12
; ENABLE-NEXT: cmn lr, #1
-; ENABLE-NEXT: bgt .LBB0_7
-; ENABLE-NEXT: @ %bb.11: @ %if.then7
-; ENABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1
+; ENABLE-NEXT: bgt .LBB0_3
+; ENABLE-NEXT: @ %bb.7: @ %if.then7
+; ENABLE-NEXT: @ in Loop: Header=BB0_3 Depth=1
; ENABLE-NEXT: cmp r0, r2
-; ENABLE-NEXT: bls .LBB0_7
-; ENABLE-NEXT: @ %bb.12: @ %land.rhs14.preheader
-; ENABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1
+; ENABLE-NEXT: bls .LBB0_3
+; ENABLE-NEXT: @ %bb.8: @ %land.rhs14.preheader
+; ENABLE-NEXT: @ in Loop: Header=BB0_3 Depth=1
; ENABLE-NEXT: cmn lr, #1
-; ENABLE-NEXT: bgt .LBB0_7
-; ENABLE-NEXT: @ %bb.13: @ %land.rhs14.preheader
-; ENABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1
+; ENABLE-NEXT: bgt .LBB0_3
+; ENABLE-NEXT: @ %bb.9: @ %land.rhs14.preheader
+; ENABLE-NEXT: @ in Loop: Header=BB0_3 Depth=1
; ENABLE-NEXT: cmp r12, #191
-; ENABLE-NEXT: bhi .LBB0_7
-; ENABLE-NEXT: @ %bb.14: @ %while.body24.preheader
-; ENABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1
+; ENABLE-NEXT: bhi .LBB0_3
+; ENABLE-NEXT: @ %bb.10: @ %while.body24.preheader
+; ENABLE-NEXT: @ in Loop: Header=BB0_3 Depth=1
; ENABLE-NEXT: sub r3, r3, #2
-; ENABLE-NEXT: .LBB0_15: @ %while.body24
-; ENABLE-NEXT: @ Parent Loop BB0_7 Depth=1
+; ENABLE-NEXT: .LBB0_11: @ %while.body24
+; ENABLE-NEXT: @ Parent Loop BB0_3 Depth=1
; ENABLE-NEXT: @ => This Inner Loop Header: Depth=2
; ENABLE-NEXT: mov r0, r3
; ENABLE-NEXT: cmp r3, r2
-; ENABLE-NEXT: bls .LBB0_7
-; ENABLE-NEXT: @ %bb.16: @ %while.body24.land.rhs14_crit_edge
-; ENABLE-NEXT: @ in Loop: Header=BB0_15 Depth=2
+; ENABLE-NEXT: bls .LBB0_3
+; ENABLE-NEXT: @ %bb.12: @ %while.body24.land.rhs14_crit_edge
+; ENABLE-NEXT: @ in Loop: Header=BB0_11 Depth=2
; ENABLE-NEXT: mov r3, r0
; ENABLE-NEXT: ldrsb lr, [r3], #-1
; ENABLE-NEXT: cmn lr, #1
; ENABLE-NEXT: uxtb r12, lr
-; ENABLE-NEXT: bgt .LBB0_7
-; ENABLE-NEXT: @ %bb.17: @ %while.body24.land.rhs14_crit_edge
-; ENABLE-NEXT: @ in Loop: Header=BB0_15 Depth=2
+; ENABLE-NEXT: bgt .LBB0_3
+; ENABLE-NEXT: @ %bb.13: @ %while.body24.land.rhs14_crit_edge
+; ENABLE-NEXT: @ in Loop: Header=BB0_11 Depth=2
; ENABLE-NEXT: cmp r12, #192
-; ENABLE-NEXT: blo .LBB0_15
-; ENABLE-NEXT: b .LBB0_7
-; ENABLE-NEXT: .LBB0_18:
+; ENABLE-NEXT: blo .LBB0_11
+; ENABLE-NEXT: b .LBB0_3
+; ENABLE-NEXT: .LBB0_14:
; ENABLE-NEXT: mov r0, r3
; ENABLE-NEXT: pop {r11, pc}
+; ENABLE-NEXT: .LBB0_15: @ %while.body.preheader
+; ENABLE-NEXT: movw r12, :lower16:skip
+; ENABLE-NEXT: sub r1, r1, #1
+; ENABLE-NEXT: movt r12, :upper16:skip
+; ENABLE-NEXT: .LBB0_16: @ %while.body
+; ENABLE-NEXT: @ =>This Inner Loop Header: Depth=1
+; ENABLE-NEXT: ldrb r3, [r0]
+; ENABLE-NEXT: ldrb r3, [r12, r3]
+; ENABLE-NEXT: add r0, r0, r3
+; ENABLE-NEXT: sub r3, r1, #1
+; ENABLE-NEXT: cmp r3, r1
+; ENABLE-NEXT: bhs .LBB0_2
+; ENABLE-NEXT: @ %bb.17: @ %while.body
+; ENABLE-NEXT: @ in Loop: Header=BB0_16 Depth=1
+; ENABLE-NEXT: mov r1, r3
+; ENABLE-NEXT: cmp r0, r2
+; ENABLE-NEXT: blo .LBB0_16
+; ENABLE-NEXT: b .LBB0_2
;
; DISABLE-LABEL: wrongUseOfPostDominate:
; DISABLE: @ %bb.0: @ %entry
; DISABLE-NEXT: .save {r11, lr}
; DISABLE-NEXT: push {r11, lr}
; DISABLE-NEXT: cmn r1, #1
-; DISABLE-NEXT: ble .LBB0_7
+; DISABLE-NEXT: ble .LBB0_3
; DISABLE-NEXT: @ %bb.1: @ %while.cond.preheader
; DISABLE-NEXT: cmp r1, #0
-; DISABLE-NEXT: beq .LBB0_6
-; DISABLE-NEXT: @ %bb.2: @ %while.cond.preheader
-; DISABLE-NEXT: cmp r0, r2
-; DISABLE-NEXT: pophs {r11, pc}
-; DISABLE-NEXT: .LBB0_3: @ %while.body.preheader
-; DISABLE-NEXT: movw r12, :lower16:skip
-; DISABLE-NEXT: sub r1, r1, #1
-; DISABLE-NEXT: movt r12, :upper16:skip
-; DISABLE-NEXT: .LBB0_4: @ %while.body
-; DISABLE-NEXT: @ =>This Inner Loop Header: Depth=1
-; DISABLE-NEXT: ldrb r3, [r0]
-; DISABLE-NEXT: ldrb r3, [r12, r3]
-; DISABLE-NEXT: add r0, r0, r3
-; DISABLE-NEXT: sub r3, r1, #1
-; DISABLE-NEXT: cmp r3, r1
-; DISABLE-NEXT: bhs .LBB0_6
-; DISABLE-NEXT: @ %bb.5: @ %while.body
-; DISABLE-NEXT: @ in Loop: Header=BB0_4 Depth=1
-; DISABLE-NEXT: mov r1, r3
-; DISABLE-NEXT: cmp r0, r2
-; DISABLE-NEXT: blo .LBB0_4
-; DISABLE-NEXT: .LBB0_6: @ %if.end29
+; DISABLE-NEXT: cmpne r0, r2
+; DISABLE-NEXT: blo .LBB0_15
+; DISABLE-NEXT: .LBB0_2: @ %if.end29
; DISABLE-NEXT: pop {r11, pc}
-; DISABLE-NEXT: .LBB0_7: @ %while.cond2.outer
+; DISABLE-NEXT: .LBB0_3: @ %while.cond2.outer
; DISABLE-NEXT: @ =>This Loop Header: Depth=1
-; DISABLE-NEXT: @ Child Loop BB0_8 Depth 2
-; DISABLE-NEXT: @ Child Loop BB0_15 Depth 2
+; DISABLE-NEXT: @ Child Loop BB0_4 Depth 2
+; DISABLE-NEXT: @ Child Loop BB0_11 Depth 2
; DISABLE-NEXT: mov r3, r0
-; DISABLE-NEXT: .LBB0_8: @ %while.cond2
-; DISABLE-NEXT: @ Parent Loop BB0_7 Depth=1
+; DISABLE-NEXT: .LBB0_4: @ %while.cond2
+; DISABLE-NEXT: @ Parent Loop BB0_3 Depth=1
; DISABLE-NEXT: @ => This Inner Loop Header: Depth=2
; DISABLE-NEXT: add r1, r1, #1
; DISABLE-NEXT: cmp r1, #1
-; DISABLE-NEXT: beq .LBB0_18
-; DISABLE-NEXT: @ %bb.9: @ %while.body4
-; DISABLE-NEXT: @ in Loop: Header=BB0_8 Depth=2
+; DISABLE-NEXT: beq .LBB0_14
+; DISABLE-NEXT: @ %bb.5: @ %while.body4
+; DISABLE-NEXT: @ in Loop: Header=BB0_4 Depth=2
; DISABLE-NEXT: cmp r3, r2
-; DISABLE-NEXT: bls .LBB0_8
-; DISABLE-NEXT: @ %bb.10: @ %if.then7
-; DISABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1
+; DISABLE-NEXT: bls .LBB0_4
+; DISABLE-NEXT: @ %bb.6: @ %if.then7
+; DISABLE-NEXT: @ in Loop: Header=BB0_3 Depth=1
; DISABLE-NEXT: mov r0, r3
; DISABLE-NEXT: ldrb r12, [r0, #-1]!
; DISABLE-NEXT: sxtb lr, r12
; DISABLE-NEXT: cmn lr, #1
-; DISABLE-NEXT: bgt .LBB0_7
-; DISABLE-NEXT: @ %bb.11: @ %if.then7
-; DISABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1
+; DISABLE-NEXT: bgt .LBB0_3
+; DISABLE-NEXT: @ %bb.7: @ %if.then7
+; DISABLE-NEXT: @ in Loop: Header=BB0_3 Depth=1
; DISABLE-NEXT: cmp r0, r2
-; DISABLE-NEXT: bls .LBB0_7
-; DISABLE-NEXT: @ %bb.12: @ %land.rhs14.preheader
-; DISABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1
+; DISABLE-NEXT: bls .LBB0_3
+; DISABLE-NEXT: @ %bb.8: @ %land.rhs14.preheader
+; DISABLE-NEXT: @ in Loop: Header=BB0_3 Depth=1
; DISABLE-NEXT: cmn lr, #1
-; DISABLE-NEXT: bgt .LBB0_7
-; DISABLE-NEXT: @ %bb.13: @ %land.rhs14.preheader
-; DISABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1
+; DISABLE-NEXT: bgt .LBB0_3
+; DISABLE-NEXT: @ %bb.9: @ %land.rhs14.preheader
+; DISABLE-NEXT: @ in Loop: Header=BB0_3 Depth=1
; DISABLE-NEXT: cmp r12, #191
-; DISABLE-NEXT: bhi .LBB0_7
-; DISABLE-NEXT: @ %bb.14: @ %while.body24.preheader
-; DISABLE-NEXT: @ in Loop: Header=BB0_7 Depth=1
+; DISABLE-NEXT: bhi .LBB0_3
+; DISABLE-NEXT: @ %bb.10: @ %while.body24.preheader
+; DISABLE-NEXT: @ in Loop: Header=BB0_3 Depth=1
; DISABLE-NEXT: sub r3, r3, #2
-; DISABLE-NEXT: .LBB0_15: @ %while.body24
-; DISABLE-NEXT: @ Parent Loop BB0_7 Depth=1
+; DISABLE-NEXT: .LBB0_11: @ %while.body24
+; DISABLE-NEXT: @ Parent Loop BB0_3 Depth=1
; DISABLE-NEXT: @ => This Inner Loop Header: Depth=2
; DISABLE-NEXT: mov r0, r3
; DISABLE-NEXT: cmp r3, r2
-; DISABLE-NEXT: bls .LBB0_7
-; DISABLE-NEXT: @ %bb.16: @ %while.body24.land.rhs14_crit_edge
-; DISABLE-NEXT: @ in Loop: Header=BB0_15 Depth=2
+; DISABLE-NEXT: bls .LBB0_3
+; DISABLE-NEXT: @ %bb.12: @ %while.body24.land.rhs14_crit_edge
+; DISABLE-NEXT: @ in Loop: Header=BB0_11 Depth=2
; DISABLE-NEXT: mov r3, r0
; DISABLE-NEXT: ldrsb lr, [r3], #-1
; DISABLE-NEXT: cmn lr, #1
; DISABLE-NEXT: uxtb r12, lr
-; DISABLE-NEXT: bgt .LBB0_7
-; DISABLE-NEXT: @ %bb.17: @ %while.body24.land.rhs14_crit_edge
-; DISABLE-NEXT: @ in Loop: Header=BB0_15 Depth=2
+; DISABLE-NEXT: bgt .LBB0_3
+; DISABLE-NEXT: @ %bb.13: @ %while.body24.land.rhs14_crit_edge
+; DISABLE-NEXT: @ in Loop: Header=BB0_11 Depth=2
; DISABLE-NEXT: cmp r12, #192
-; DISABLE-NEXT: blo .LBB0_15
-; DISABLE-NEXT: b .LBB0_7
-; DISABLE-NEXT: .LBB0_18:
+; DISABLE-NEXT: blo .LBB0_11
+; DISABLE-NEXT: b .LBB0_3
+; DISABLE-NEXT: .LBB0_14:
; DISABLE-NEXT: mov r0, r3
; DISABLE-NEXT: pop {r11, pc}
+; DISABLE-NEXT: .LBB0_15: @ %while.body.preheader
+; DISABLE-NEXT: movw r12, :lower16:skip
+; DISABLE-NEXT: sub r1, r1, #1
+; DISABLE-NEXT: movt r12, :upper16:skip
+; DISABLE-NEXT: .LBB0_16: @ %while.body
+; DISABLE-NEXT: @ =>This Inner Loop Header: Depth=1
+; DISABLE-NEXT: ldrb r3, [r0]
+; DISABLE-NEXT: ldrb r3, [r12, r3]
+; DISABLE-NEXT: add r0, r0, r3
+; DISABLE-NEXT: sub r3, r1, #1
+; DISABLE-NEXT: cmp r3, r1
+; DISABLE-NEXT: bhs .LBB0_2
+; DISABLE-NEXT: @ %bb.17: @ %while.body
+; DISABLE-NEXT: @ in Loop: Header=BB0_16 Depth=1
+; DISABLE-NEXT: mov r1, r3
+; DISABLE-NEXT: cmp r0, r2
+; DISABLE-NEXT: blo .LBB0_16
+; DISABLE-NEXT: b .LBB0_2
entry:
%cmp = icmp sgt i32 %off, -1
br i1 %cmp, label %while.cond.preheader, label %while.cond2.outer
``````````
</details>
https://github.com/llvm/llvm-project/pull/150261
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