[llvm] [AMDGPU] Add option to prevent insns straddling half cache-line boundaries (PR #150239)

[via llvm-commits]

github-actions[bot] wrote:

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:warning: Python code formatter, darker found issues in your code. :warning:

<details>
<summary>
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``````````bash
darker --check --diff -r HEAD~1...HEAD llvm/test/CodeGen/AMDGPU/has_cache_straddle.py
``````````

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<details>
<summary>
View the diff from darker here.
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``````````diff
--- has_cache_straddle.py	2025-07-23 15:25:57.000000 +0000
+++ has_cache_straddle.py	2025-07-23 15:36:28.749797 +0000
@@ -1,29 +1,29 @@
 #!/usr/bin/env python3
 
 import re
 import sys
 
-if len(sys.argv) !=2 :
+if len(sys.argv) != 2:
     print("Usage: has_straddle.py <dissasembly file>")
     sys.exit(1)
 
 inputFilename = sys.argv[1]
-address_and_encoding_regex = r"// (\S{12}):(( [0-9A-F]{8})+)";
+address_and_encoding_regex = r"// (\S{12}):(( [0-9A-F]{8})+)"
 
 file = open(inputFilename)
 
-for line in file :
-    match = re.search(address_and_encoding_regex,line)
-    if match :
+for line in file:
+    match = re.search(address_and_encoding_regex, line)
+    if match:
         hexaddress = match.group(1)
         encoding = match.group(2)
         dwords = encoding.split()
         address = int(hexaddress, 16)
-        address_end = address + len(dwords)*4 - 1
-        #Cache-line is 64 bytes.  Check for half cache-line straddle.
-        if address//32 != address_end//32:
+        address_end = address + len(dwords) * 4 - 1
+        # Cache-line is 64 bytes.  Check for half cache-line straddle.
+        if address // 32 != address_end // 32:
             print("Straddling instruction found at:")
             print(line)
             sys.exit(1)
 
 sys.exit(0)

``````````

</details>


https://github.com/llvm/llvm-project/pull/150239