[llvm] [DAG] optimize llvm.ucmp for 1-bit inputs to return subtraction of operands (PR #150058)

[Gaurav Dhingra via llvm-commits]

https://github.com/gxyd created https://github.com/llvm/llvm-project/pull/150058

## Description

Intends to fix: https://github.com/llvm/llvm-project/issues/129401

I came across contributor guide for InstCombine: https://llvm.org/docs/InstCombineContributorGuide.html, do we've a similar guide for SelectionDAG?

I still need to figure out how to run tests locally to ensure that my changes don't break anything (not necessarily relying on CI).

>From efe4a63ec089b9a55ce4979e1d2f2b688692ddb9 Mon Sep 17 00:00:00 2001
From: Gaurav Dhingra <gauravdhingra.gxyd at gmail.com>
Date: Tue, 22 Jul 2025 22:00:34 +0530
Subject: [PATCH 1/2] [DAG] optimize llvm.ucmp for 1-bit inputs to return sub
 zext

---
 llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 000f8cc6786a5..eb17f5febd09a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -10942,6 +10942,10 @@ SDValue TargetLowering::expandCMP(SDNode *Node, SelectionDAG &DAG) const {
   SDValue IsLT = DAG.getSetCC(dl, BoolVT, LHS, RHS, LTPredicate);
   SDValue IsGT = DAG.getSetCC(dl, BoolVT, LHS, RHS, GTPredicate);
 
+  if (isa<VTSDNode>(RHS->getOperand(1)) &&
+      cast<VTSDNode>(RHS->getOperand(1))->getVT().getScalarSizeInBits() == 1) {
+    return DAG.getNode(ISD::SUB, dl, VT, LHS, RHS);
+  }
   // We can't perform arithmetic on i1 values. Extending them would
   // probably result in worse codegen, so let's just use two selects instead.
   // Some targets are also just better off using selects rather than subtraction

>From c8bdafc979457b7c546f1ca1892b9def8dda6e76 Mon Sep 17 00:00:00 2001
From: Gaurav Dhingra <gauravdhingra.gxyd at gmail.com>
Date: Tue, 22 Jul 2025 22:02:34 +0530
Subject: [PATCH 2/2] try adding a test case for SelectionDAG

---
 llvm/test/CodeGen/Generic/ucmp_i1.ll | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 llvm/test/CodeGen/Generic/ucmp_i1.ll

diff --git a/llvm/test/CodeGen/Generic/ucmp_i1.ll b/llvm/test/CodeGen/Generic/ucmp_i1.ll
new file mode 100644
index 0000000000000..16eb2de4e4dea
--- /dev/null
+++ b/llvm/test/CodeGen/Generic/ucmp_i1.ll
@@ -0,0 +1,13 @@
+; RUN: llc -o - %s | FileCheck %s
+define i8 @test_ucmp_i8_i1(i1 zeroext %a, i1 zeroext %b) {
+  %cmp = call i8 @llvm.ucmp.i8.i1(i1 %a, i1 %b)
+  ret i8 %cmp
+}
+
+define i16 @test_ucmp_i16_i1(i1 zeroext %a, i1 zeroext %b) {
+  %cmp = call i16 @llvm.ucmp.i16.i1(i1 %a, i1 %b)
+  ret i16 %cmp
+}
+
+declare i8 @llvm.ucmp.i8.i1(i1, i1)
+declare i16 @llvm.ucmp.i16.i1(i1, i1)