[llvm] [update_mir_test_checks] Add missing MIFlags (PR #150012)

[Fabian Ritter via llvm-commits]

ritter-x2a wrote:


> As an alternative could we assume that any lower case string is an MIFlag and that instruction names are in upper case? Or would that be too fragile?

I like this idea, but it seems opcodes currently can start either with an upper-case letter or with a lower-case `t` according to this script: `(?P<opcode>[A-Zt][A-Za-z0-9_]+)`. So, an all-lower-case opcode starting with `t` might be possible. I don't know why the `t` is an option; it has been in the script like this since the script was introduced.

Opcodes that are not entirely upper-case do exist, we have at least some like `V_AND_B32_e32` in AMDGPU (but those wouldn't be an issue as long as they start with an upper-case letter).

https://github.com/llvm/llvm-project/pull/150012