[llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #144714)

[Sirish Pande via llvm-commits]

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@@ -194,66 +194,61 @@ define amdgpu_kernel void @test_sched_group_barrier_pipeline_WMMA_interleave(ptr
 ; GCN-NEXT:    v_dual_mov_b32 v9, v1 :: v_dual_mov_b32 v8, v0
 ; GCN-NEXT:    s_delay_alu instid0(VALU_DEP_1)
 ; GCN-NEXT:    v_wmma_f16_16x16x16_f16 v[8:15], v[0:7], v[0:7], v[8:15]
+; GCN-NEXT:    ds_load_b128 v[4:7], v32 offset:2064
+; GCN-NEXT:    ds_load_b128 v[0:3], v32 offset:2048
+; GCN-NEXT:    ds_load_b128 v[20:23], v32 offset:6160
+; GCN-NEXT:    ds_load_b128 v[16:19], v32 offset:6144
+; GCN-NEXT:    ds_load_b128 v[28:31], v32 offset:12304
+; GCN-NEXT:    ds_load_b128 v[24:27], v32 offset:12288
+; GCN-NEXT:    ds_load_b128 v[36:39], v32 offset:20496
+; GCN-NEXT:    ds_load_b128 v[32:35], v32 offset:20480
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srpande wrote:

Scheduling of ds_load and ds_store (with sched_group_barrier) are not respected with the change. 

If this is intentional, then we need to figure out of the why sched_group_barrier was added in the first place. In that case, we need to change the original test needs to be updated with respect to sched_group_barrier.

If this is not intentional, then we need to understand why are we no respecting the intrinsics behavior.

https://github.com/llvm/llvm-project/pull/144714