[llvm] [AssignmentTracking][NFC] Cache interesting debug records and instructions (PR #149514)

[Orlando Cazalet-Hyams via llvm-commits]

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@@ -1862,47 +1876,31 @@ void AssignmentTrackingLowering::resetInsertionPoint(DbgVariableRecord &After) {
 }
 
 void AssignmentTrackingLowering::process(BasicBlock &BB, BlockInfo *LiveSet) {
-  // If the block starts with DbgRecords, we need to process those DbgRecords as
-  // their own frame without processing any instructions first.
-  bool ProcessedLeadingDbgRecords = !BB.begin()->hasDbgRecords();
-  for (auto II = BB.begin(), EI = BB.end(); II != EI;) {
-    assert(VarsTouchedThisFrame.empty());
-    // Process the instructions in "frames". A "frame" includes a single
-    // non-debug instruction followed any debug instructions before the
-    // next non-debug instruction.
-
-    // Skip the current instruction if it has unprocessed DbgRecords attached
-    // (see comment above `ProcessedLeadingDbgRecords`).
-    if (ProcessedLeadingDbgRecords) {
-      // II is now either a debug intrinsic, a non-debug instruction with no
-      // attached DbgRecords, or a non-debug instruction with attached processed
-      // DbgRecords.
-      // II has not been processed.
-      if (II->isTerminator())
-        break;
-      resetInsertionPoint(*II);
-      processNonDbgInstruction(*II, LiveSet);
-      assert(LiveSet->isValid());
-      ++II;
+  auto &BBCache = DbgOrInstCache[&BB];
+  // Process the instructions in "frames". A "frame" includes a single
+  // non-debug instruction followed any debug instructions before the
+  // next non-debug instruction. A pointer-int int value of 1 on an
+  // instruction means non-debug instructions follow (end of frame).
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OCHyams wrote:

err, note to self, this comment has the bit value the wrong way around

https://github.com/llvm/llvm-project/pull/149514