[llvm] [HEXAGON] Add AssertSext in sign-extended mpy (PR #149061)

Sudharsan Veeravalli via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 21 00:46:19 PDT 2025

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svs-quic wrote:

/cherry-pick fcabb53

https://github.com/llvm/llvm-project/pull/149061

Previous message: [llvm] [X86] Try to shrink signed i64 compares if the input has enough one bits (PR #149719)
Next message: [llvm] [HEXAGON] Add AssertSext in sign-extended mpy (PR #149061)
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