[llvm] [AArch64] Ensure we transferImpOps on BSP pseudo expansions. (PR #149456)

Ricardo Jesus via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 21 00:22:28 PDT 2025


rj-jesus wrote:

> Is seems OK to me. What do you think is wrong with it? (Other than subreg-liveness inefficiencies).

I think it must be something I'm misunderstanding, I agree with you it doesn't look wrong. What's confusing me is the implicit-def operand in `renamable $q16 = BSPv16i8 killed renamable $q0, renamable $q4, renamable $q21, implicit-def $q16_q17_q18_q19`. What's preventing `q17`, `q18` or `q19` from being hypothetically defined and killed between `ST1Fourv2d killed renamable $q16_q17_q18_q19 (...)` and `renamable $q16 = BSPv16i8 (...) implicit-def $q16_q17_q18_q19`, which would then presumably render the last three ORRs incorrect?

https://github.com/llvm/llvm-project/pull/149456


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