[llvm] [RISC-V] Update SpacemiT-X60 Vector Integer latencies (PR #149207)
Mikhail R. Gadelha via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 18 13:14:56 PDT 2025
https://github.com/mikhailramalho updated https://github.com/llvm/llvm-project/pull/149207
>From 18c2b1fb70cc1276954fad1b4a33e5f35974fb6d Mon Sep 17 00:00:00 2001
From: "Mikhail R. Gadelha" <mikhail at igalia.com>
Date: Wed, 16 Jul 2025 19:10:44 -0300
Subject: [PATCH 1/5] Added Vector Integer Instruction latencies
Signed-off-by: Mikhail R. Gadelha <mikhail at igalia.com>
---
.../lib/Target/RISCV/RISCVSchedSpacemitX60.td | 226 +-
.../RISCV/SpacemitX60/rvv-arithmetic.s | 2610 ++++++++---------
.../llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s | 1946 ++++++------
.../RISCV/SpacemitX60/rvv-comparison.s | 1762 +++++------
.../RISCV/SpacemitX60/rvv-conversion.s | 226 +-
.../llvm-mca/RISCV/SpacemitX60/rvv-fma.s | 562 ++--
.../llvm-mca/RISCV/SpacemitX60/rvv-minmax.s | 546 ++--
.../llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s | 884 +++---
.../RISCV/SpacemitX60/rvv-permutation.s | 530 ++--
9 files changed, 4711 insertions(+), 4581 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
index 3e286a754e4ee..fdbfce241eee1 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
@@ -24,6 +24,87 @@ class SMX60IsWorstCaseMXSEW<string mx, int sew, list<string> MxList, bit isF = 0
bit c = !and(!eq(mx, LLMUL), !eq(sew, SSEW));
}
+defvar SMX60VLEN = 256;
+defvar SMX60DLEN = !div(SMX60VLEN, 2);
+
+class Get1248Latency<string mx> {
+ int c = !cond(
+ !eq(mx, "M1") : 1,
+ !eq(mx, "M2") : 2,
+ !eq(mx, "M4") : 4,
+ !eq(mx, "M8") : 8,
+ !eq(mx, "MF2") : 1,
+ !eq(mx, "MF4") : 1,
+ !eq(mx, "MF8") : 1
+ );
+}
+
+// Used for: logical opsz, shifts, sign ext, merge/move, FP sign/recip/convert, mask ops, slides
+class Get44816Latency<string mx> {
+ int c = !cond(
+ !eq(mx, "M1") : 4,
+ !eq(mx, "M2") : 4,
+ !eq(mx, "M4") : 8,
+ !eq(mx, "M8") : 16,
+ !eq(mx, "MF2") : 4,
+ !eq(mx, "MF4") : 4,
+ !eq(mx, "MF8") : 4
+ );
+}
+
+// Used for: arithmetic (add/sub/min/max), saturating/averaging, FP add/sub/min/max
+class Get4458Latency<string mx> {
+ int c = !cond(
+ !eq(mx, "M1") : 4,
+ !eq(mx, "M2") : 4,
+ !eq(mx, "M4") : 5,
+ !eq(mx, "M8") : 8,
+ !eq(mx, "MF2") : 4,
+ !eq(mx, "MF4") : 4,
+ !eq(mx, "MF8") : 4
+ );
+}
+
+// Widening scaling pattern (4,4,4,4,5,8,8): plateaus at higher LMULs
+// Used for: widening operations
+class Get4588Latency<string mx> {
+ int c = !cond(
+ !eq(mx, "M1") : 4,
+ !eq(mx, "M2") : 5,
+ !eq(mx, "M4") : 8,
+ !eq(mx, "M8") : 8, // M8 not supported for most widening, fallback
+ !eq(mx, "MF2") : 4,
+ !eq(mx, "MF4") : 4,
+ !eq(mx, "MF8") : 4
+ );
+}
+
+// Used for: mask-producing comparisons, carry ops with mask, FP comparisons
+class Get461018Latency<string mx> {
+ int c = !cond(
+ !eq(mx, "M1") : 4,
+ !eq(mx, "M2") : 6,
+ !eq(mx, "M4") : 10,
+ !eq(mx, "M8") : 18,
+ !eq(mx, "MF2") : 4,
+ !eq(mx, "MF4") : 4,
+ !eq(mx, "MF8") : 4
+ );
+}
+
+// Used for: e64 multiply pattern, complex ops
+class Get781632Latency<string mx> {
+ int c = !cond(
+ !eq(mx, "M1") : 7,
+ !eq(mx, "M2") : 8,
+ !eq(mx, "M4") : 16,
+ !eq(mx, "M8") : 32,
+ !eq(mx, "MF2") : 7,
+ !eq(mx, "MF4") : 7,
+ !eq(mx, "MF8") : 7
+ );
+}
+
def SpacemitX60Model : SchedMachineModel {
let IssueWidth = 2; // dual-issue
let MicroOpBufferSize = 0; // in-order
@@ -322,71 +403,120 @@ foreach LMul = [1, 2, 4, 8] in {
foreach mx = SchedMxList in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
- defm "" : LMULWriteResMX<"WriteVIALUV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIALUX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIALUI", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVExtV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUI", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUMV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUMX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUMI", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICmpV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICmpX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICmpI", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMinMaxV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMinMaxX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMergeV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMergeX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMergeI", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMovV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMovX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMovI", [SMX60_VIEU], mx, IsWorstCase>;
-
- defm "" : LMULWriteResMX<"WriteVShiftV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVShiftX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVShiftI", [SMX60_VIEU], mx, IsWorstCase>;
-
- defm "" : LMULWriteResMX<"WriteVIMulV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMulX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMulAddV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMulAddX", [SMX60_VIEU], mx, IsWorstCase>;
+ let Latency = Get4458Latency<mx>.c, ReleaseAtCycles = [Get1248Latency<mx>.c] in {
+ defm "" : LMULWriteResMX<"WriteVIMinMaxV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMinMaxX", [SMX60_VIEU], mx, IsWorstCase>;
+ }
+
+ let Latency = Get44816Latency<mx>.c, ReleaseAtCycles = [Get44816Latency<mx>.c] in {
+ // Pattern of vadd, vsub, vrsub: 4/4/5/8
+ // Pattern of vand, vor, vxor: 4/4/8/16
+ // They are grouped together, so we used the worst case 4/4/5/16
+ // TODO: use InstRW to override individual instructions' scheduling data
+ defm "" : LMULWriteResMX<"WriteVIALUV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIALUX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIALUI", [SMX60_VIEU], mx, IsWorstCase>;
+
+ defm "" : LMULWriteResMX<"WriteVExtV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMergeV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMergeX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMergeI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMovV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMovX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMovI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVShiftV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVShiftX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVShiftI", [SMX60_VIEU], mx, IsWorstCase>;
+
+ defm "" : LMULWriteResMX<"WriteVICALUV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUI", [SMX60_VIEU], mx, IsWorstCase>;
+ }
+
+ let Latency = Get461018Latency<mx>.c, ReleaseAtCycles = [Get461018Latency<mx>.c] in {
+ defm "" : LMULWriteResMX<"WriteVICALUMV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUMX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUMI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICmpV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICmpX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICmpI", [SMX60_VIEU], mx, IsWorstCase>;
+ }
+
+ // Pattern of vmacc, vmadd, vmul, vmulh, etc.: e8/e16 = 4/4/5/8, e32 = 5,5,5,8,
+ // e64 = 7,8,16,32. We use the worst-case until we can split the SEW.
+ // TODO: change WriteVIMulV, etc to be defined with LMULSEWSchedWrites
+ let Latency = Get781632Latency<mx>.c in {
+ defm "" : LMULWriteResMX<"WriteVIMulV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMulX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMulAddV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMulAddX", [SMX60_VIEU], mx, IsWorstCase>;
+ }
}
// Widening
+// Pattern of vwmul, vwmacc, etc: e8/e16 = 4/4/5/8, e32 = 5,5,5,8
+// We use the worst-case for all.
foreach mx = SchedMxListW in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
- defm "" : LMULWriteResMX<"WriteVIWALUV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWALUX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWALUI", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWMulV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWMulX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWMulAddV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWMulAddX", [SMX60_VIEU], mx, IsWorstCase>;
+ defvar WideningLat = Get4588Latency<mx>.c;
+ let Latency = WideningLat, ReleaseAtCycles = [Get1248Latency<mx>.c] in {
+ defm "" : LMULWriteResMX<"WriteVIWALUV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWALUX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWALUI", [SMX60_VIEU], mx, IsWorstCase>;
+ }
+ let Latency = WideningLat in {
+ defm "" : LMULWriteResMX<"WriteVIWMulV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWMulX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWMulAddV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWMulAddX", [SMX60_VIEU], mx, IsWorstCase>;
+ }
}
-// Vector Integer Division and Remainder
+// Division and remainder operations
+// Pattern of vdivu: 11/11/11/20/40/80/160
+// Pattern of vdiv: 12/12/12/22/44/88/176
+// Pattern of vremu: 12/12/12/22/44/88/176
+// Pattern of vrem: 13/13/13/24/48/96/192
+// We use the worst-case for all: 24/24/24/24/48/96/192
+// TODO: Create separate WriteVIRem to more closely match the latencies
foreach mx = SchedMxList in {
foreach sew = SchedSEWSet<mx>.val in {
defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxList>.c;
- defm "" : LMULSEWWriteResMXSEW<"WriteVIDivV", [SMX60_VIEU], mx, sew, IsWorstCase>;
- defm "" : LMULSEWWriteResMXSEW<"WriteVIDivX", [SMX60_VIEU], mx, sew, IsWorstCase>;
+ let Latency = !mul(Get1248Latency<mx>.c, 24) in {
+ defm "" : LMULSEWWriteResMXSEW<"WriteVIDivV", [SMX60_VIEU], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVIDivX", [SMX60_VIEU], mx, sew, IsWorstCase>;
+ }
}
}
-// Narrowing Shift and Clips
-foreach mx = SchedMxListW in {
+// Fractional LMUL Narrowing Shift and Clips
+foreach mx = ["MF8", "MF4", "MF2", "M1"] in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
- defm "" : LMULWriteResMX<"WriteVNShiftV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVNShiftX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVNShiftI", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVNClipV", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVNClipX", [SMX60_VIEU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVNClipI", [SMX60_VIEU], mx, IsWorstCase>;
+ let Latency = Get44816Latency<mx>.c in {
+ defm "" : LMULWriteResMX<"WriteVNShiftV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNShiftX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNShiftI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNClipV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNClipX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNClipI", [SMX60_VIEU], mx, IsWorstCase>;
+ }
+}
+
+// Integer LMUL Narrowing Shift and Clips
+foreach mx = ["M2", "M4"] in {
+ defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
+
+ let Latency = !mul(Get44816Latency<mx>.c, 2) in {
+ defm "" : LMULWriteResMX<"WriteVNShiftV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNShiftX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNShiftI", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNClipV", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNClipX", [SMX60_VIEU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNClipI", [SMX60_VIEU], mx, IsWorstCase>;
+ }
}
// 12. Vector Fixed-Point Arithmetic Instructions
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
index c7755dcc37658..70c60f86ee009 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
@@ -2322,685 +2322,685 @@ vwsub.wx v8, v16, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -3354,533 +3354,533 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4322,245 +4322,245 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK: Resources:
# CHECK-NEXT: [0] - SMX60_FP
@@ -4574,450 +4574,450 @@ vwsub.wx v8, v16, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 1120.00 - - - - 1120.00 -
+# CHECK-NEXT: - 1120.00 - - - - 4412.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5027,9 +5027,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5037,17 +5037,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5057,9 +5057,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5067,17 +5067,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5087,9 +5087,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5097,17 +5097,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5117,9 +5117,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5127,17 +5127,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5147,9 +5147,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5157,17 +5157,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5177,9 +5177,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5187,17 +5187,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5207,9 +5207,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5217,17 +5217,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5237,9 +5237,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5247,17 +5247,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5611,533 +5611,533 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6587,9 +6587,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6597,17 +6597,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6617,9 +6617,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6627,17 +6627,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6647,9 +6647,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6657,17 +6657,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6677,9 +6677,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6687,17 +6687,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6707,9 +6707,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6717,17 +6717,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6737,9 +6737,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6747,17 +6747,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6767,9 +6767,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6777,17 +6777,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6797,9 +6797,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6807,14 +6807,14 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
index 0b5dd607c7196..49180aee630c2 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
@@ -1478,1157 +1478,1157 @@ vssrl.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2906,406 +2906,406 @@ vssrl.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 708.00 - - - - 708.00 -
+# CHECK-NEXT: - 708.00 - - - - 3048.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3667,401 +3667,401 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
index e381b45642628..c28e36024033a 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
@@ -926,885 +926,885 @@ vmslt.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK: Resources:
# CHECK-NEXT: [0] - SMX60_FP
@@ -1818,887 +1818,887 @@ vmslt.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 440.00 - - - - 440.00 -
+# CHECK-NEXT: - 440.00 - - - - 3520.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 6.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 10.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 6.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 10.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
index ca6e9d15332af..972444a125b53 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
@@ -615,117 +615,117 @@ vfwcvt.xu.f.v v8, v16
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1189,122 +1189,122 @@ vfwcvt.xu.f.v v8, v16
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 281.00 - - - 225.00 56.00 -
+# CHECK-NEXT: - 281.00 - - - 225.00 416.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 8.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 16.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - 1.00 - - vfcvt.f.xu.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
index a3105c39ff978..ee186f0d6b798 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
@@ -755,567 +755,567 @@ vfwnmsac.vv v8, v16, v24
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
index 4cc496b7de72e..d25e5897ed925 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
@@ -386,357 +386,357 @@ vminu.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK: Resources:
# CHECK-NEXT: [0] - SMX60_FP
@@ -750,7 +750,7 @@ vminu.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 176.00 - - - - 176.00 -
+# CHECK-NEXT: - 176.00 - - - - 528.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
@@ -763,11 +763,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -775,29 +775,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -807,11 +807,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -819,29 +819,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -851,11 +851,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -863,29 +863,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -895,11 +895,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -907,29 +907,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -939,11 +939,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -951,29 +951,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -983,11 +983,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -995,29 +995,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1027,11 +1027,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1039,29 +1039,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1071,11 +1071,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1083,26 +1083,26 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
index 5faf2628105f7..42eb6842d3a3c 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
@@ -1022,889 +1022,889 @@ vsmul.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
index fa53c08995c29..a628e9dd5e0e3 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
@@ -1198,137 +1198,137 @@ vfslide1up.vf v8, v16, ft0
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2120,137 +2120,137 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2354,142 +2354,142 @@ vfslide1up.vf v8, v16, ft0
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 572.00 - - - 45.00 527.00 -
+# CHECK-NEXT: - 572.00 - - - 45.00 1307.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3281,137 +3281,137 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
>From d99a4b9e78b14d99633ced9809ef2e9357f6fda8 Mon Sep 17 00:00:00 2001
From: "Mikhail R. Gadelha" <mikhail at igalia.com>
Date: Wed, 16 Jul 2025 19:32:00 -0300
Subject: [PATCH 2/5] Added missing ReleaseAtCycles
Signed-off-by: Mikhail R. Gadelha <mikhail at igalia.com>
---
.../lib/Target/RISCV/RISCVSchedSpacemitX60.td | 4 +-
.../llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s | 722 +++++++++---------
2 files changed, 363 insertions(+), 363 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
index fdbfce241eee1..31e2675c14025 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
@@ -495,7 +495,7 @@ foreach mx = SchedMxList in {
foreach mx = ["MF8", "MF4", "MF2", "M1"] in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
- let Latency = Get44816Latency<mx>.c in {
+ let Latency = Get44816Latency<mx>.c, ReleaseAtCycles = [Get44816Latency<mx>.c] in {
defm "" : LMULWriteResMX<"WriteVNShiftV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVNShiftX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVNShiftI", [SMX60_VIEU], mx, IsWorstCase>;
@@ -509,7 +509,7 @@ foreach mx = ["MF8", "MF4", "MF2", "M1"] in {
foreach mx = ["M2", "M4"] in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
- let Latency = !mul(Get44816Latency<mx>.c, 2) in {
+ let Latency = !mul(Get44816Latency<mx>.c, 2), ReleaseAtCycles = [!mul(Get44816Latency<mx>.c, 2)] in {
defm "" : LMULWriteResMX<"WriteVNShiftV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVNShiftX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVNShiftI", [SMX60_VIEU], mx, IsWorstCase>;
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
index 49180aee630c2..18c1b12912d9e 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
@@ -1874,365 +1874,365 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2906,7 +2906,7 @@ vssrl.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 708.00 - - - - 3048.00 -
+# CHECK-NEXT: - 708.00 - - - - 4164.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
@@ -3307,365 +3307,365 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 8.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 16.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
>From 5cf63573ec5ae1fc7acbb30e9b2c6034749ab86a Mon Sep 17 00:00:00 2001
From: "Mikhail R. Gadelha" <mikhail at igalia.com>
Date: Thu, 17 Jul 2025 05:06:23 -0300
Subject: [PATCH 3/5] Updated helper classes
Signed-off-by: Mikhail R. Gadelha <mikhail at igalia.com>
---
.../lib/Target/RISCV/RISCVSchedSpacemitX60.td | 32 ++++---------------
1 file changed, 6 insertions(+), 26 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
index 31e2675c14025..64b8b82243bc8 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
@@ -29,39 +29,28 @@ defvar SMX60DLEN = !div(SMX60VLEN, 2);
class Get1248Latency<string mx> {
int c = !cond(
- !eq(mx, "M1") : 1,
!eq(mx, "M2") : 2,
!eq(mx, "M4") : 4,
!eq(mx, "M8") : 8,
- !eq(mx, "MF2") : 1,
- !eq(mx, "MF4") : 1,
- !eq(mx, "MF8") : 1
+ true: 1
);
}
// Used for: logical opsz, shifts, sign ext, merge/move, FP sign/recip/convert, mask ops, slides
class Get44816Latency<string mx> {
int c = !cond(
- !eq(mx, "M1") : 4,
- !eq(mx, "M2") : 4,
!eq(mx, "M4") : 8,
!eq(mx, "M8") : 16,
- !eq(mx, "MF2") : 4,
- !eq(mx, "MF4") : 4,
- !eq(mx, "MF8") : 4
+ true: 4
);
}
// Used for: arithmetic (add/sub/min/max), saturating/averaging, FP add/sub/min/max
class Get4458Latency<string mx> {
int c = !cond(
- !eq(mx, "M1") : 4,
- !eq(mx, "M2") : 4,
!eq(mx, "M4") : 5,
!eq(mx, "M8") : 8,
- !eq(mx, "MF2") : 4,
- !eq(mx, "MF4") : 4,
- !eq(mx, "MF8") : 4
+ true: 4
);
}
@@ -69,39 +58,30 @@ class Get4458Latency<string mx> {
// Used for: widening operations
class Get4588Latency<string mx> {
int c = !cond(
- !eq(mx, "M1") : 4,
!eq(mx, "M2") : 5,
!eq(mx, "M4") : 8,
!eq(mx, "M8") : 8, // M8 not supported for most widening, fallback
- !eq(mx, "MF2") : 4,
- !eq(mx, "MF4") : 4,
- !eq(mx, "MF8") : 4
+ true: 4
);
}
// Used for: mask-producing comparisons, carry ops with mask, FP comparisons
class Get461018Latency<string mx> {
int c = !cond(
- !eq(mx, "M1") : 4,
!eq(mx, "M2") : 6,
!eq(mx, "M4") : 10,
!eq(mx, "M8") : 18,
- !eq(mx, "MF2") : 4,
- !eq(mx, "MF4") : 4,
- !eq(mx, "MF8") : 4
+ true: 4
);
}
// Used for: e64 multiply pattern, complex ops
class Get781632Latency<string mx> {
int c = !cond(
- !eq(mx, "M1") : 7,
!eq(mx, "M2") : 8,
!eq(mx, "M4") : 16,
!eq(mx, "M8") : 32,
- !eq(mx, "MF2") : 7,
- !eq(mx, "MF4") : 7,
- !eq(mx, "MF8") : 7
+ true: 7
);
}
>From c575ceba832e465c99501d945b8477f6bc8e4c3c Mon Sep 17 00:00:00 2001
From: "Mikhail R. Gadelha" <mikhail at igalia.com>
Date: Thu, 17 Jul 2025 05:13:45 -0300
Subject: [PATCH 4/5] Fixed typo
Signed-off-by: Mikhail R. Gadelha <mikhail at igalia.com>
---
llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
index 64b8b82243bc8..ebe5cc2e120e7 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
@@ -391,7 +391,7 @@ foreach mx = SchedMxList in {
let Latency = Get44816Latency<mx>.c, ReleaseAtCycles = [Get44816Latency<mx>.c] in {
// Pattern of vadd, vsub, vrsub: 4/4/5/8
// Pattern of vand, vor, vxor: 4/4/8/16
- // They are grouped together, so we used the worst case 4/4/5/16
+ // They are grouped together, so we used the worst case 4/4/8/16
// TODO: use InstRW to override individual instructions' scheduling data
defm "" : LMULWriteResMX<"WriteVIALUV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIALUX", [SMX60_VIEU], mx, IsWorstCase>;
>From c62f52d9d6e009772305867b846e63fc45023079 Mon Sep 17 00:00:00 2001
From: "Mikhail R. Gadelha" <mikhail at igalia.com>
Date: Fri, 18 Jul 2025 17:11:29 -0300
Subject: [PATCH 5/5] Changed latencies
Signed-off-by: Mikhail R. Gadelha <mikhail at igalia.com>
---
.../lib/Target/RISCV/RISCVSchedSpacemitX60.td | 18 +-
.../RISCV/SpacemitX60/rvv-arithmetic.s | 2322 ++++++++---------
.../llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s | 2306 ++++++++--------
.../RISCV/SpacemitX60/rvv-comparison.s | 1762 ++++++-------
.../RISCV/SpacemitX60/rvv-conversion.s | 226 +-
.../llvm-mca/RISCV/SpacemitX60/rvv-fma.s | 874 +++----
.../llvm-mca/RISCV/SpacemitX60/rvv-minmax.s | 386 +--
.../llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s | 1554 +++++------
.../RISCV/SpacemitX60/rvv-permutation.s | 530 ++--
9 files changed, 4989 insertions(+), 4989 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
index ebe5cc2e120e7..216663f4ac1a8 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
@@ -383,12 +383,12 @@ foreach LMul = [1, 2, 4, 8] in {
foreach mx = SchedMxList in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c;
- let Latency = Get4458Latency<mx>.c, ReleaseAtCycles = [Get1248Latency<mx>.c] in {
+ let Latency = Get4458Latency<mx>.c in {
defm "" : LMULWriteResMX<"WriteVIMinMaxV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIMinMaxX", [SMX60_VIEU], mx, IsWorstCase>;
}
- let Latency = Get44816Latency<mx>.c, ReleaseAtCycles = [Get44816Latency<mx>.c] in {
+ let Latency = Get44816Latency<mx>.c in {
// Pattern of vadd, vsub, vrsub: 4/4/5/8
// Pattern of vand, vor, vxor: 4/4/8/16
// They are grouped together, so we used the worst case 4/4/8/16
@@ -413,7 +413,7 @@ foreach mx = SchedMxList in {
defm "" : LMULWriteResMX<"WriteVICALUI", [SMX60_VIEU], mx, IsWorstCase>;
}
- let Latency = Get461018Latency<mx>.c, ReleaseAtCycles = [Get461018Latency<mx>.c] in {
+ let Latency = Get461018Latency<mx>.c in {
defm "" : LMULWriteResMX<"WriteVICALUMV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVICALUMX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVICALUMI", [SMX60_VIEU], mx, IsWorstCase>;
@@ -425,7 +425,7 @@ foreach mx = SchedMxList in {
// Pattern of vmacc, vmadd, vmul, vmulh, etc.: e8/e16 = 4/4/5/8, e32 = 5,5,5,8,
// e64 = 7,8,16,32. We use the worst-case until we can split the SEW.
// TODO: change WriteVIMulV, etc to be defined with LMULSEWSchedWrites
- let Latency = Get781632Latency<mx>.c in {
+ let Latency = Get781632Latency<mx>.c, ReleaseAtCycles = [Get781632Latency<mx>.c] in {
defm "" : LMULWriteResMX<"WriteVIMulV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIMulX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIMulAddV", [SMX60_VIEU], mx, IsWorstCase>;
@@ -440,12 +440,12 @@ foreach mx = SchedMxListW in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
defvar WideningLat = Get4588Latency<mx>.c;
- let Latency = WideningLat, ReleaseAtCycles = [Get1248Latency<mx>.c] in {
+ let Latency = WideningLat in {
defm "" : LMULWriteResMX<"WriteVIWALUV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIWALUX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIWALUI", [SMX60_VIEU], mx, IsWorstCase>;
}
- let Latency = WideningLat in {
+ let Latency = WideningLat, ReleaseAtCycles = [Get1248Latency<mx>.c] in {
defm "" : LMULWriteResMX<"WriteVIWMulV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIWMulX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVIWMulAddV", [SMX60_VIEU], mx, IsWorstCase>;
@@ -464,7 +464,7 @@ foreach mx = SchedMxList in {
foreach sew = SchedSEWSet<mx>.val in {
defvar IsWorstCase = SMX60IsWorstCaseMXSEW<mx, sew, SchedMxList>.c;
- let Latency = !mul(Get1248Latency<mx>.c, 24) in {
+ let Latency = !mul(Get1248Latency<mx>.c, 24), ReleaseAtCycles = [!mul(Get1248Latency<mx>.c, 24)] in {
defm "" : LMULSEWWriteResMXSEW<"WriteVIDivV", [SMX60_VIEU], mx, sew, IsWorstCase>;
defm "" : LMULSEWWriteResMXSEW<"WriteVIDivX", [SMX60_VIEU], mx, sew, IsWorstCase>;
}
@@ -475,7 +475,7 @@ foreach mx = SchedMxList in {
foreach mx = ["MF8", "MF4", "MF2", "M1"] in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
- let Latency = Get44816Latency<mx>.c, ReleaseAtCycles = [Get44816Latency<mx>.c] in {
+ let Latency = Get44816Latency<mx>.c in {
defm "" : LMULWriteResMX<"WriteVNShiftV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVNShiftX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVNShiftI", [SMX60_VIEU], mx, IsWorstCase>;
@@ -489,7 +489,7 @@ foreach mx = ["MF8", "MF4", "MF2", "M1"] in {
foreach mx = ["M2", "M4"] in {
defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxListW>.c;
- let Latency = !mul(Get44816Latency<mx>.c, 2), ReleaseAtCycles = [!mul(Get44816Latency<mx>.c, 2)] in {
+ let Latency = !mul(Get44816Latency<mx>.c, 2) in {
defm "" : LMULWriteResMX<"WriteVNShiftV", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVNShiftX", [SMX60_VIEU], mx, IsWorstCase>;
defm "" : LMULWriteResMX<"WriteVNShiftI", [SMX60_VIEU], mx, IsWorstCase>;
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
index 70c60f86ee009..712132f13d2b8 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
@@ -2322,445 +2322,445 @@ vwsub.wx v8, v16, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2770,9 +2770,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2780,17 +2780,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2800,9 +2800,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2810,17 +2810,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2830,9 +2830,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2840,17 +2840,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2860,9 +2860,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2870,17 +2870,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2890,9 +2890,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2900,17 +2900,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2920,9 +2920,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2930,17 +2930,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2950,9 +2950,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2960,17 +2960,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2980,9 +2980,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2990,17 +2990,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -3354,533 +3354,533 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4330,9 +4330,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -4340,17 +4340,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4360,9 +4360,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -4370,17 +4370,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4390,9 +4390,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -4400,17 +4400,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4420,9 +4420,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -4430,17 +4430,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4450,9 +4450,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -4460,17 +4460,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4480,9 +4480,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -4490,17 +4490,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4510,9 +4510,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -4520,17 +4520,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4540,9 +4540,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -4550,17 +4550,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK: Resources:
# CHECK-NEXT: [0] - SMX60_FP
@@ -4574,450 +4574,450 @@ vwsub.wx v8, v16, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 1120.00 - - - - 4412.00 -
+# CHECK-NEXT: - 1120.00 - - - - 1120.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vadd.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5027,9 +5027,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5037,17 +5037,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5057,9 +5057,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5067,17 +5067,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5087,9 +5087,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5097,17 +5097,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5117,9 +5117,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5127,17 +5127,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5147,9 +5147,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5157,17 +5157,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5177,9 +5177,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5187,17 +5187,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5207,9 +5207,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5217,17 +5217,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5237,9 +5237,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5247,17 +5247,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5611,533 +5611,533 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vrsub.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6587,9 +6587,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6597,17 +6597,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6617,9 +6617,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6627,17 +6627,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6647,9 +6647,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6657,17 +6657,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6677,9 +6677,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6687,17 +6687,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwadd.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6707,9 +6707,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6717,17 +6717,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6737,9 +6737,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6747,17 +6747,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6767,9 +6767,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6777,17 +6777,17 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6797,9 +6797,9 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6807,14 +6807,14 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vwsub.wx v8, v16, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
index 18c1b12912d9e..75819b6d95d30 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s
@@ -1478,1157 +1478,1157 @@ vssrl.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WI vnclipu.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WV vnclipu.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WV vnclipu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIPU_WX vnclipu.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIPU_WX vnclipu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WI vnclip.wi v8, v16, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WI vnclip.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WV vnclip.wv v8, v16, v24
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WV vnclip.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNCLIP_WX vnclip.wx v8, v16, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2906,1162 +2906,1162 @@ vssrl.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 708.00 - - - - 4164.00 -
+# CHECK-NEXT: - 708.00 - - - - 708.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vand.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vand.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vand.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vxor.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsra.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclipu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclipu.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclip.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wi v8, v16, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclip.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vnclip.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - 1.00 - vnclip.wx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsll.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsra.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vsrl.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
index c28e36024033a..75bbe5c26d280 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-comparison.s
@@ -926,885 +926,885 @@ vmslt.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 6 6.00 6 SMX60_VIEU[6] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 1.00 6 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 10 10.00 10 SMX60_VIEU[10] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 1.00 10 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 18 18.00 18 SMX60_VIEU[18] VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 18 1.00 18 SMX60_VIEU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK: Resources:
# CHECK-NEXT: [0] - SMX60_FP
@@ -1818,887 +1818,887 @@ vmslt.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 440.00 - - - - 3520.00 -
+# CHECK-NEXT: - 440.00 - - - - 440.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmseq.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsle.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsleu.vi v8, v8, 12
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsne.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vv v8, v8, v8
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# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 6.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 10.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 18.00 - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmslt.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
index 972444a125b53..6db44d2074499 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
@@ -615,117 +615,117 @@ vfwcvt.xu.f.v v8, v16
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1189,122 +1189,122 @@ vfwcvt.xu.f.v v8, v16
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 281.00 - - - 225.00 416.00 -
+# CHECK-NEXT: - 281.00 - - - 225.00 56.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf2 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf4 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vsext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - 1.00 - vzext.vf8 v8, v16
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - 1.00 - - vfcvt.f.xu.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
index ee186f0d6b798..1dd8b46ca36d9 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
@@ -755,357 +755,357 @@ vfwnmsac.vv v8, v16, v24
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1115,9 +1115,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1125,17 +1125,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1145,9 +1145,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1155,17 +1155,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1175,9 +1175,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1185,17 +1185,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1205,9 +1205,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1215,17 +1215,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1235,9 +1235,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1245,17 +1245,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1265,9 +1265,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1275,17 +1275,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1295,9 +1295,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1305,17 +1305,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFWMACC_VF vfwmacc.vf v8, fa6, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1473,362 +1473,362 @@ vfwnmsac.vv v8, v16, v24
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 353.00 - - - 72.00 281.00 -
+# CHECK-NEXT: - 353.00 - - - 72.00 2541.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmacc.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmacc.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmadd.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmadd.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 7.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 8.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 16.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - 32.00 - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1838,9 +1838,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1848,17 +1848,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1868,9 +1868,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1878,17 +1878,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1898,9 +1898,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1908,17 +1908,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1928,9 +1928,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1938,17 +1938,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1958,9 +1958,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1968,17 +1968,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1988,9 +1988,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1998,17 +1998,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2018,9 +2018,9 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2028,17 +2028,17 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
index d25e5897ed925..c228ac56831d2 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-minmax.s
@@ -394,11 +394,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -406,29 +406,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -438,11 +438,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -450,29 +450,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -482,11 +482,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -494,29 +494,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -526,11 +526,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -538,29 +538,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -570,11 +570,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -582,29 +582,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -614,11 +614,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -626,29 +626,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -658,11 +658,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -670,29 +670,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -702,11 +702,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -714,29 +714,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMINU_VX vminu.vx v8, v8, t5
# CHECK: Resources:
# CHECK-NEXT: [0] - SMX60_FP
@@ -750,7 +750,7 @@ vminu.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 176.00 - - - - 528.00 -
+# CHECK-NEXT: - 176.00 - - - - 176.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
@@ -763,11 +763,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -775,29 +775,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -807,11 +807,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -819,29 +819,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmax.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -851,11 +851,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -863,29 +863,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -895,11 +895,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -907,29 +907,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -939,11 +939,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -951,29 +951,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -983,11 +983,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -995,29 +995,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vmin.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1027,11 +1027,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1039,29 +1039,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1071,11 +1071,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1083,26 +1083,26 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 2.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 1.00 - vminu.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
index 42eb6842d3a3c..b16c4a442593c 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s
@@ -1022,709 +1022,709 @@ vsmul.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 24 1.00 24 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 24 24.00 24 SMX60_VIEU[24] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 48 1.00 48 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 48 48.00 48 SMX60_VIEU[48] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 96 1.00 96 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 96 96.00 96 SMX60_VIEU[96] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 192 1.00 192 SMX60_VIEU VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 192 192.00 192 SMX60_VIEU[192] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 7 7.00 7 SMX60_VIEU[7] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 32 1.00 32 SMX60_VIEU VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1734,9 +1734,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1744,17 +1744,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1764,9 +1764,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1774,17 +1774,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1794,9 +1794,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1804,17 +1804,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1824,9 +1824,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1834,17 +1834,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1854,9 +1854,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1864,17 +1864,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -1884,9 +1884,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1894,17 +1894,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 5 1.00 5 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 5 2.00 5 SMX60_VIEU[2] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2006,714 +2006,714 @@ vsmul.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 486.00 - - - - 486.00 -
+# CHECK-NEXT: - 486.00 - - - - 15230.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmul.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdiv.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdiv.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vdivu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vdivu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vrem.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 24.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 48.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 96.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 192.00 - vremu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulh.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulh.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 16.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - 32.00 - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 7.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 8.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 16.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - 32.00 - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2723,9 +2723,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2733,17 +2733,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmul.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2753,9 +2753,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2763,17 +2763,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwmul.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2783,9 +2783,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2793,17 +2793,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2813,9 +2813,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2823,17 +2823,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2843,9 +2843,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2853,17 +2853,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2873,9 +2873,9 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2883,17 +2883,17 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 2.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 1.00 - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - 4.00 - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
index a628e9dd5e0e3..78dd0b0adb609 100644
--- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
@@ -1198,137 +1198,137 @@ vfslide1up.vf v8, v16, ft0
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VMV_X_S vmv.x.s s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2120,137 +2120,137 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 8 1.00 8 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 16 1.00 16 SMX60_VIEU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 SMX60_VFP VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2354,142 +2354,142 @@ vfslide1up.vf v8, v16, ft0
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
-# CHECK-NEXT: - 572.00 - - - 45.00 1307.00 -
+# CHECK-NEXT: - 572.00 - - - 45.00 527.00 -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.v v8, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.x v8, s0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - 1.00 - vmv.v.i v8, 12
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vmv.x.s s0, v8
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3281,137 +3281,137 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: - - - - - - 1.00 - vrgatherei16.vv v8, v16, v24
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - 4.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - 8.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - 16.00 - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - 1.00 - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - 1.00 - - vfmerge.vfm v8, v8, ft0, v0
# CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
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