[llvm] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes (PR #149494)

[via llvm-commits]

https://github.com/woruyu created https://github.com/llvm/llvm-project/pull/149494

None

>From f2e6cc32750fff9f5d8c77829231d86032200419 Mon Sep 17 00:00:00 2001
From: woruyu <1214539920 at qq.com>
Date: Fri, 18 Jul 2025 18:55:21 +0800
Subject: [PATCH] [DAG][ARM] computeKnownBitsForTargetNode - add handling for
 ARMISD VORRIMM\VBICIMM nodes

---
 llvm/lib/Target/ARM/ARMISelLowering.cpp | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index fd3b0525c1056..e9ec35fa1dd8c 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -20106,6 +20106,31 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
     Known = KnownOp0.intersectWith(KnownOp1);
     break;
   }
+  case ARMISD::VORRIMM: {
+    KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
+
+    unsigned Encoded = Op.getConstantOperandVal(1);
+    unsigned ElemSize = Op.getValueType().getScalarSizeInBits();
+    uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, ElemSize);
+    APInt Imm(Known.getBitWidth(), DecodedVal);
+
+    Known.One = KnownLHS.One | Imm;
+    Known.Zero = KnownLHS.Zero & ~Imm;
+    return;
+  }
+  case ARMISD::VBICIMM: {
+    KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
+
+    unsigned Encoded = Op.getConstantOperandVal(1);
+    unsigned ElemSize = Op.getValueType().getScalarSizeInBits();
+    uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, ElemSize);
+    APInt Imm(Known.getBitWidth(), DecodedVal);
+
+    APInt NotImm = ~Imm;
+    Known.One = KnownLHS.One & NotImm;
+    Known.Zero = KnownLHS.Zero | Imm;
+    return;
+  }
   }
 }