[llvm] [TableGen] Add some -time-phases support in CodeGenRegisters (PR #149309)

Jason Eckhardt via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 17 08:07:57 PDT 2025


https://github.com/nvjle approved this pull request.

LGTM, thanks!


FWIW, below are improvements on the downstream back-end mentioned in 149122 (before and after 149122). And as you mentioned there, there is more low-hanging fruit.
===-------------------------------------------------------------------------===
                             TableGen Phase Timing
===-------------------------------------------------------------------------===
  Total Execution Time: 1.5125 seconds (1.5126 wall clock)

   ---User Time---   --System Time--   --User+System--   ---Wall Time---  --- Name ---
   0.9544 ( 67.7%)   0.0901 ( 88.1%)   1.0445 ( 69.1%)   1.0446 ( 69.1%)  Parse, build records
   0.3278 ( 23.2%)   0.0079 (  7.8%)   0.3357 ( 22.2%)   0.3357 ( 22.2%)  Print target registers
   0.0394 (  2.8%)   0.0000 (  0.0%)   0.0394 (  2.6%)   0.0394 (  2.6%)  Compute reg unit weights
   0.0315 (  2.2%)   0.0000 (  0.0%)   0.0315 (  2.1%)   0.0315 (  2.1%)  Compute inferred register classes
   0.0263 (  1.9%)   0.0000 (  0.0%)   0.0263 (  1.7%)   0.0263 (  1.7%)  Print MC registers
   0.0184 (  1.3%)   0.0002 (  0.2%)   0.0186 (  1.2%)   0.0186 (  1.2%)  Extend super-register classes
   0.0113 (  0.8%)   0.0000 (  0.0%)   0.0113 (  0.7%)   0.0113 (  0.7%)  Print enums
   0.0009 (  0.1%)   0.0041 (  4.0%)   0.0050 (  0.3%)   0.0050 (  0.3%)  Write output
   0.0001 (  0.0%)   0.0000 (  0.0%)   0.0001 (  0.0%)   0.0001 (  0.0%)  Print header fragment
   1.4102 (100.0%)   0.1023 (100.0%)   1.5125 (100.0%)   1.5126 (100.0%)  Total

===-------------------------------------------------------------------------===
                             TableGen Phase Timing
===-------------------------------------------------------------------------===
  Total Execution Time: 1.4949 seconds (1.4950 wall clock)

   ---User Time---   --System Time--   --User+System--   ---Wall Time---  --- Name ---
   0.9558 ( 68.0%)   0.0810 ( 90.8%)   1.0368 ( 69.4%)   1.0369 ( 69.4%)  Parse, build records
   0.3238 ( 23.0%)   0.0079 (  8.8%)   0.3316 ( 22.2%)   0.3316 ( 22.2%)  Print target registers
   0.0380 (  2.7%)   0.0001 (  0.2%)   0.0381 (  2.6%)   0.0381 (  2.6%)  Compute reg unit weights
   0.0280 (  2.0%)   0.0000 (  0.0%)   0.0280 (  1.9%)   0.0280 (  1.9%)  Compute inferred register classes
   0.0267 (  1.9%)   0.0000 (  0.0%)   0.0267 (  1.8%)   0.0267 (  1.8%)  Print MC registers
   0.0175 (  1.2%)   0.0001 (  0.1%)   0.0176 (  1.2%)   0.0176 (  1.2%)  Extend super-register classes
   0.0111 (  0.8%)   0.0000 (  0.0%)   0.0111 (  0.7%)   0.0111 (  0.7%)  Print enums
   0.0048 (  0.3%)   0.0000 (  0.1%)   0.0048 (  0.3%)   0.0048 (  0.3%)  Write output
   0.0001 (  0.0%)   0.0000 (  0.0%)   0.0001 (  0.0%)   0.0001 (  0.0%)  Print header fragment
   1.4058 (100.0%)   0.0892 (100.0%)   1.4949 (100.0%)   1.4950 (100.0%)  Total


https://github.com/llvm/llvm-project/pull/149309


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